Advances, Challenges, and Solutions for Programmable Switching ASICs – Alibaba Cloud’s Self‑Developed Compiler

Programmable switching ASICs enable the off‑loading of network functions from CPUs to hardware, delivering terabit‑level packet processing; since their debut in 2015 they have attracted strong interest from cloud networking companies and academia, and are regarded as a key future technology.

Despite their benefits, data‑plane programming remains early‑stage, requiring low‑level, chip‑specific languages (e.g., P4, NPL) and deep hardware knowledge, which makes development inefficient and complex.

Three core challenges hinder large‑scale deployment of programmable networks:

Chip architecture and language diversity – developers must master multiple languages for different chips (e.g., P4 for Tofino, NPL for Trident‑4). Example code shows the stark difference between NPL and P4, and even within the same language, code varies across chip architectures: if (ipv4.sip == ipv4.dip) { // Do something }

Distributed programming – a single data‑plane application may span many devices with heterogeneous chips and languages, requiring separate programs for each device (e.g., load balancer tables on ToR, Agg, and Core layers).

Chip resource optimization – limited table and pipeline resources mean multiple applications (INT, load balancer, firewall) may not fit on a single chip without careful manual optimization.

To address these issues, Alibaba Cloud’s infrastructure network team built the world’s first high‑level language and compiler system for programmable networks. The compiler abstracts away chip details, automatically generates appropriate low‑level code for each target, and performs aggressive synthesis and resource‑optimisation.

Using the compiler, developers can write concise high‑level statements such as: v16 = (v8_a << 8) | v8_b instead of the verbose multi‑table P4 code shown earlier: action a_get_v16_1 () { v16 = v8_a; } action a_get_v16_2 () { v16 = v16 << 8; } action a_get_v16_3 () { v16 = v16 | v8_b; } table get_v16_1 {a_get_v16_1}; table get_v16_2 {a_get_v16_2}; table get_v16_3 {a_get_v16_3}; control get_v16{ apply(get_v16_1); apply(get_v16_2); apply(get_v16_3); }

The compiler also automatically reads network topology, decides optimal deployment locations, and eliminates the need for developers to manually map functions to specific devices.

Empirical results reported at ACM SIGCOMM 2020 show a 78% increase in development efficiency and up to 84% reduction in chip resource consumption compared with hand‑written P4 programs.

In summary, the Alibaba Cloud self‑developed compiler tackles the three major challenges of programmable networking, enabling faster, more portable, and resource‑efficient data‑plane development for cloud and edge environments.