Fundamentals 16 min read

Challenge Your STM32 & FreeRTOS Skills: 25+ Embedded Quiz Questions

This article provides a comprehensive set of multiple‑choice, fill‑in‑the‑blank, and true/false questions covering STM32 microcontroller features, FreeRTOS concepts, and general embedded system fundamentals, allowing readers to self‑assess their knowledge and identify gaps.

Liangxu Linux
Liangxu Linux
Liangxu Linux
Challenge Your STM32 & FreeRTOS Skills: 25+ Embedded Quiz Questions

Multiple‑Choice Questions

1. In STM32, which of the following can be clock sources?

a) Internal oscillator

b) External crystal oscillator

c) PLL (phase‑locked loop) multiplier

d) Combination of the above

2. Which function cannot be implemented by STM32 timers?

a) Delay operation

b) Pulse‑width modulation (PWM)

c) Encoder interface

d) Implement communication protocol

3. In STM32, interrupts cannot be used to handle which situation?

a) Error occurrence

b) External event trigger

c) Timer overflow

d) Output IIC signal

4. In STM32 UART communication, what does UART stand for?

a) Universal Asynchronous Receiver/Transmitter

b) Universal Synchronous Receiver/Transmitter

c) Universal Asynchronous Receiver/Transceiver

d) Universal Synchronous Receiver/Transceiver

5. In STM32, which mode cannot be used by GPIO?

a) Push‑pull input

b) Pull‑up input

c) Open‑drain output

d) Analog input

6. What purpose does the STM32 clock prescaler serve?

a) Reduce system clock frequency

b) Control peripheral clock speed

c) Decrease power consumption

d) Combination of the above

7. What is the role of DMA (Direct Memory Access) in STM32?

a) Accelerate data transfer

b) Control peripherals

c) Provide additional memory

d) Achieve clock synchronization

8. In STM32 timers, what is the purpose of PWM?

a) Implement input capture

b) Implement pulse‑width modulation

c) Implement counting function

d) Implement UART communication

9. What does SRAM in STM32 mainly store?

a) Executable code

b) Data and variables

c) Interrupt vector table

d) Combination of the above

10. Which principle governs setting interrupt priority in STM32?

a) Higher‑priority interrupt has higher priority

b) Lower‑priority interrupt has higher priority

c) Depends on specific requirements

d) Interrupt priority setting not supported

11. What are peripheral registers used for in STM32?

a) Store data

b) Store instructions

c) Configure and operate peripherals

d) Provide interrupt service

12. What is the interrupt vector table in STM32?

a) Array storing addresses of interrupt handler functions

b) Register storing interrupt priority

c) Configuration word storing interrupt trigger conditions

d) Register storing interrupt request flags

13. If a pin can be both input and output, which mode can it be configured as?

a) Push‑pull mode

b) Open‑drain mode

c) Multiplexed function mode

d) Analog mode

14. What is the function of the Power Management Unit (PMU) in STM32?

a) Control power switch

b) Regulate power voltage

c) Provide power monitoring and management

d) Control low‑power modes

15. Which pins can be associated with STM32 external interrupt lines?

a) Any GPIO pin

b) Specific external‑interrupt pins

c) Specific timer pins

d) Combination of the above

16. How to set a GPIO pin to open‑drain output mode in STM32?

a) Use GPIO_Init() function

b) Use GPIO_ModeConfig() function

c) Use GPIO_SetOutputMode() function

d) Open‑drain output mode not supported

17. How are peripheral registers accessed in STM32?

a) Through specific memory addresses

b) Through standard I/O functions

c) Through DMA controller

d) Through external bus interface

18. What is the role of NVIC (Nested Vectored Interrupt Controller) in STM32?

a) Manage interrupt priority

b) Allocate interrupt vector table

c) Control interrupt requests

d) Implement interrupt nesting

19. How many lines does the SPI bus use for communication?

a) 1 line

b) 2 lines

c) 3 lines

d) 4 lines

20. What does master‑slave mode of SPI mean?

a) Master can communicate with multiple slaves

b) Slave can communicate with multiple masters

c) Master controls start and end of communication

d) Slave controls start and end of communication

21. In FreeRTOS, task switching is controlled by ______.

a) Interrupts

b) Clock

c) Task scheduler

d) External trigger

22. In FreeRTOS, event flag groups are used for ______.

a) Inter‑task communication and synchronization

b) Resource contention allocation

c) Handling interrupt requests

d) Determining task priority

23. In FreeRTOS, mutexes are used to:

a) Protect shared resources

b) Restrict task access

c) Implement inter‑task synchronization

d) Implement priority inheritance

24. In FreeRTOS, a Tick refers to:

a) Length of a task's time slice

b) Scheduler clock period

c) Task priority

d) Task runtime

25. The difference between a mutex and a semaphore in FreeRTOS is:

a) Mutex can only be used for synchronization, semaphore for communication

b) Mutex allows only one task to access a shared resource, semaphore can allow multiple tasks

c) Mutex is a binary semaphore with two states, semaphore can have multiple states

d) Mutex is a special form of semaphore

Fill‑in Questions

STM32 has ______ GPIO ports in total.

In STM32 low‑power modes, STOP mode stops ______ and peripheral clocks.

The system control register NVIC is closely located to the CPU, mainly to ______.

The vector interrupt controller can support up to ______ IRQ interrupts.

STM32 DMA controller can support multiple transfer directions, including ______.

STM32 FLASH memory supports erase operations with granularity of ______.

STM32 FLASH memory is used to store program code and ______.

STM32 DMA controller supports multiple ______ direction data transfers.

STM32 clock sources include internal oscillator, external crystal oscillator, and ______.

STM32 peripheral bus interfaces include various types such as SPI, I2C, CAN, where SPI is a ______ communication interface.

The core function of the FreeRTOS task scheduler is ________.

In FreeRTOS, a mutex is a mechanism used to protect ________.

In FreeRTOS, message queues are used for ________.

The task stack size in FreeRTOS can be configured via macro definitions.

In FreeRTOS, a lower task priority means higher execution rights.

True/False Statements

An unmaskable interrupt is an interrupt whose priority cannot be adjusted.

STM32 UART can operate in both full‑duplex and half‑duplex modes.

STM32 UART can operate in both asynchronous and synchronous modes.

Each I/O port bit can be freely programmed, although the I/O port register must be accessed as a 32‑bit word.

All GPIO pins have a weak internal pull‑up and pull‑down, which can be active or inactive when configured as output.

The input data register bits [15:0] are read‑only, can only be accessed by word, and contain the input values of the corresponding I/O port.

An unmaskable interrupt is an interrupt whose priority cannot be adjusted.

STM32 ADC is a 16‑bit continuous approximation analog‑to‑digital converter.

If two interrupts have the same pre‑emptive priority, they are handled in the order they arrive.

The reset value of the input data register is 00000000H.

Software timers in FreeRTOS cannot be set to one‑shot mode.

The idle task in FreeRTOS is used to handle idle‑time tasks.

Queues in FreeRTOS are a last‑in‑first‑out data structure.

Tasks in FreeRTOS can use the stack to store local variables and parameters.

FreeRTOS supports priority inheritance to avoid priority inversion.

In FreeRTOS, only tasks can create queues; interrupt service routines cannot.

Timers in FreeRTOS do not depend on the task scheduler and can be used in interrupt context.

The heap size in FreeRTOS is statically configured and cannot be dynamically adjusted.

Mutexes in FreeRTOS can be used for both synchronization and communication between tasks.

Event flag groups in FreeRTOS can use multiple bits to represent different event states.

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FreeRTOSQuizSTM32Self‑Assessment
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