Designing Clock Drivers for an Embedded Hypervisor (Part 2)

Hypervisor’s virtual clock service allows each partition to maintain its own time base independent of the host clock, enabling guest OSes and applications to run without interfering with other partitions. The service intercepts hardware clock events such as timer interrupts, reads the real‑time hardware clock, adjusts the value according to partition scheduling, and returns a virtual timestamp.

Five scenarios that rely on the virtual clock are listed: (1) detecting a task stuck in an infinite loop, (2) outputting correct time signals for real‑time control devices, (3) waking partitions at scheduled intervals, (4) recording external event intervals, and (5) recording absolute time required by users and the system. The implementation uses the hw_clock_t data structure, defined in core/include/ktimer.h.

For Intel x86 platforms, PRTOS supports three hardware timer types:

Intel 8253 PIT – a programmable interval timer with three independent 16‑bit counters. PRTOS configures channel 0 in binary mode 2 (LSB/MSB) to generate a 1 ms periodic interrupt, records interrupt counts in a global struct pit_clock_data, and computes microsecond‑resolution timestamps. Implementation resides in core/kernel/x86/pit.c.

TSC (Time Stamp Counter) – a 64‑bit register counting CPU cycles since power‑on. It is read with the rdtsc instruction, returning the value in EDX:EAX. TSC provides fast, cycle‑accurate timing useful for performance analysis, but can become unsynchronized across cores or during frequency scaling, sleep states, or dynamic frequency changes. Intel’s TSC Sync Engine and AMD’s TSC Sync Mode mitigate these issues. The driver code is in core/kernel/x86/tsc.c.

HPET (High Precision Event Timer) – a system‑level hardware timer offering higher resolution and accuracy than the PIT. It is configured via BIOS and accessed through the HPET driver in core/kernel/x86/hpet.c, enabling high‑precision timing for real‑time applications.

PRTOS’s timer component uses the hw_timer_t structure (see core/include/ktimer.h) to manage hardware timers as per‑CPU resources. Each physical CPU (pCPU) owns a dedicated hardware timer, establishing a one‑to‑one mapping. Three timer drivers are provided: Intel 8253, HPET, and LAPIC (Local Advanced Programmable Interrupt Controller) timer. In single‑processor systems, either the PIT or HPET may be selected as the clock source; in multi‑processor (SMP) systems, only the LAPIC timer can be used.