How to Organize Shared C Code Across Multiple Applications with a Simple Makefile

1. Usage Scenario

In many enterprise projects several programs need to share a few source files. Managing each program in a separate folder leads to duplicated files and makes updates error‑prone because every copy must be edited whenever the shared code changes.

The solution is to keep the shared files in a single directory and let each application have its own folder; during compilation each program builds its own sources together with the common ones, resulting in a clear, maintainable structure.

2. Code Demonstration

The example simulates two applications, application1 and application2, both using common.h and common.c. The full source tree is shown below (the image is omitted for brevity).

// common.h – shared variable and function declaration
#define COMMON_VAR 1024
void common_fun();

// common.c – shared function implementation
void common_fun() {
    printf("this is a common function.
");
}

// application1.h
#define APP1_GREETING "this is app1"

// application1.c
int main() {
    printf("hello, %s
", APP1_GREETING);
    printf("common var is: %d
", COMMON_VAR);
    common_fun();
}

// application2.h
#define APP2_GREETING "this is app2"

// application2.c
int main() {
    printf("hello, %s
", APP2_GREETING);
    printf("common var is: %d
", COMMON_VAR);
    common_fun();
}

3. Makefile

The Makefile automatically discovers the common files and the files belonging to each application using wildcard, converts source files to object files with patsubst, and defines build rules for the two executables.

NAME_APP1 = app1
NAME_APP2 = app2

TARGETS = $(NAME_APP1) $(NAME_APP2)

SOURCE_COMMON = $(wildcard ./00_Common/*.c)
SOURCE_APP1 = $(SOURCE_COMMON) $(wildcard ./01_Application1/*.c)
SOURCE_APP2 = $(SOURCE_COMMON) $(wildcard ./02_Application2/*.c)

OBJ_APP1 = $(patsubst %.c, %.o, $(SOURCE_APP1))
OBJ_APP2 = $(patsubst %.c, %.o, $(SOURCE_APP2))

INCLUDE_COMMON = -I./00_Common/

CFLAGS = -Wall -c
CC = gcc

all: $(TARGETS)

$(NAME_APP1): $(OBJ_APP1)
	@mkdir -p output/
	$(CC) $(OBJ_APP1) -o output/$(NAME_APP1)

$(NAME_APP2): $(OBJ_APP2)
	@mkdir -p output/
	$(CC) $(OBJ_APP2) -o output/$(NAME_APP2)

%.o: %.c
	$(CC) $(INCLUDE_COMMON) $(CFLAGS) $< -o $@

.PHONY: clean
clean:
	rm -rf $(OBJ_APP1) $(OBJ_APP2) output/

4. Build Logic Explanation

Use wildcard to collect all common source files and the source files of each application.

Convert the collected .c files to .o object files with patsubst.

Add the common header directory via -I./00_Common/ so both applications can include the shared headers.

Define separate build targets ( app1 and app2) that depend on their respective object lists, create an output directory, and link the objects into executables.

Provide a clean rule to remove generated objects and binaries.

5. Compilation Result

Running make produces two executables, app1 and app2, each printing its greeting, the shared variable value, and the message from the common function, demonstrating that the shared code is compiled only once and linked into both programs.