Understanding LCD Hardware: Pixel Formats, Framebuffer, and Interface Standards

Different Interfaces of LCD Hardware Operation Principles

Modern smartphones use LCD and OLED displays; this article focuses on LCD technology.

1. How Application Engineers View LCDs

LCDs consist of individual pixels arranged in rows (xres) and columns (yres), giving a resolution of xres × yres.

Controlling the color of each pixel allows drawing text and images on the LCD.

1.1 How Pixel Colors Are Represented

Colors are expressed with red, green, and blue components. Common formats include:

bpp (bits per pixel): number of bits used for each pixel.

24 bpp: actually stored in 32 bits, with 8 bits unused; the remaining 24 bits are split into 8 bits each for R, G, B.

16 bpp: formats such as RGB565 and RGB555.

1.2 How Colors Are Sent to the LCD

If each pixel uses 16 bits, the total memory required for an LCD with xres × yres pixels is xres × yres × 16 / 8 bytes. This memory region is called the framebuffer.

Each entry in the framebuffer corresponds to one pixel.

The size of each entry depends on the pixel format (e.g., 16 bits, 24 bits).

After configuring the LCD hardware, writing color data to the framebuffer updates the display.

2. How Driver Engineers View LCDs

2.1 Unified LCD Hardware Model

2.2 MCU‑Typical 8080 Interface LCD Modules

Low‑performance microcontrollers often use an external module that integrates a framebuffer, LCD controller, and the LCD panel.

The interface includes CS (chip select), RD (read), WR (write), a data bus, and a cmd/data line that distinguishes command from data transfers.

This approach limits screen size because the module’s framebuffer is SRAM, which is expensive.

2.3 MPU‑Typical TFT‑RGB Interface

Embedded Linux systems usually use a TFT‑RGB interface where memory and the LCD controller are integrated into the SoC, with an external LCD panel.

Signal lines include DCLK, RGB data lines, HSYNC, VSYNC, and DE (data enable).

1、横向移动像素点：DCLK
2、从最右移动到下一行最左：HSYNC
3、从右下角移动到左上角：VSYNC
4、RGB 是数据线
5、DE：data enable

2.4 MIPI Standard

MIPI stands for Mobile Industry Processor Interface. It is an open standard defined by the MIPI Alliance to simplify internal mobile device connections such as cameras, displays, and RF modules.

For LCDs, MIPI defines three interface families:

MIPI‑DBI (Display Bus Interface)

Supports both data and command transmission; the classic 8080 interface belongs here.

Type B (i‑80 system): 8/9/16/18/24‑bit bus.

Type C (Serial data transfer, 3/4‑line SPI).

MIPI‑DPI (Display Pixel Interface)

Pixel‑oriented, used by MPU‑based LCD controllers.

Supports 24 bit/pixel (8 bits each for R, G, B), 18 bit/pixel (6 bits each), and 16 bit/pixel (5‑6‑5).

MIPI‑DSI (Display Serial Interface)

Serial interface that reduces the number of required pins compared to DBI/DPI.

Supports one data lane up to 500 Mbps.

Compliant with DSI version 1.01 and D‑PHY version 1.00.

Reference: 百问网‑韦东山驱动大全.