Tagged articles

memory consistency

2 articles · Page 1 of 1

Apr 2, 2026 · Fundamentals

Technical Briefing #4 2026: Kernel Memory Leaks, THP Latency, Linked Lists & Android Internals

This technical briefing curates ten deep-dive articles covering Linux kernel memory leaks, Transparent Huge Pages latency pitfalls, linked list performance on modern hardware, Android AutoFDO optimization, memory consistency debugging, PageCache internals, DMA-BUF zero-copy architecture, and mutex/futex priority inheritance traps.

Android internalsAutoFDODMA-BUF

0 likes · 6 min read

Technical Briefing #4 2026: Kernel Memory Leaks, THP Latency, Linked Lists & Android Internals

Liangxu Linux

Jul 5, 2023 · Fundamentals

Why CPUs Need Cache Memory and How the MESI Protocol Keeps It Consistent

Modern CPUs use multi‑level cache memory to bridge the speed gap with main memory, relying on temporal and spatial locality, and employ the MESI protocol with states M, E, S, I to maintain coherence across cores, while techniques like store buffers and memory barriers mitigate latency and ordering issues.

CPUCache Memoryhardware architecture

0 likes · 15 min read

Why CPUs Need Cache Memory and How the MESI Protocol Keeps It Consistent