Accelerating Deep Learning for Retail: Model Compression, Speed & Energy

Challenges of Deep Learning in Retail

Retail stores are cost centers and the platform for digital transformation. Applying deep learning brings benefits such as predictive loss prevention and multi‑dimensional customer‑flow analysis, but also three major challenges: ever‑increasing model size, slower inference speed, and high energy consumption.

Deep Learning Model Compression and Acceleration Framework

The framework addresses the three challenges through three pillars: algorithms, hardware, and open‑source frameworks.

Algorithmic Optimizations

Network design (e.g., SqueezeNet, ShuffleNet, MobileNet), knowledge distillation, and pruning (structured and unstructured) reduce model complexity.

Hardware Platforms

Supports CPUs, GPUs, FPGA, DSP, and dedicated accelerators. Vendors such as NVIDIA, Intel, Huawei, and Rockchip provide SDKs like TensorRT for further speed‑up.

Open‑Source Frameworks

TensorFlow, Caffe, PyTorch, MXNet, and ONNX enable model conversion and deployment across diverse environments.

Key Techniques Covered in the Course

Deep learning accelerated network design

Network pruning techniques

Computation acceleration methods

Hardware platform acceleration

Application scenarios of acceleration technology

Accelerated Network Design: MobileNet Example

MobileNet achieves higher accuracy with lower computational cost compared with GoogleNet and VGG16 on ImageNet. It replaces the standard Conv‑BN‑ReLU block with depthwise separable convolution followed by pointwise convolution, dramatically reducing multiply‑adds.

Depthwise separable convolution splits a conventional convolution into a depthwise step (per‑channel filtering) and a pointwise 1×1 convolution, lowering FLOPs especially when output channels and kernel size grow.

Network Pruning

Pruning removes redundant weights, turning a dense network into a sparse one, thereby decreasing storage and compute requirements while preserving most of the accuracy.

Computation Acceleration

Layer fusion (e.g., merging Conv‑BN‑ReLU into a single CBR unit) and horizontal merging of identical blocks reduce memory traffic and arithmetic operations.

Hardware Platform Acceleration

Choosing appropriate hardware (GPU, CPU, FPGA, etc.) and leveraging vendor SDKs such as NVIDIA TensorRT can further accelerate inference. Heterogeneous computing (CPU+GPU, CPU+FPGA) enables parallel processing of large workloads.

Application Scenarios

Accelerated models enable edge deployment for use cases such as customer‑flow statistics, facial recognition, digital stores, intelligent logistics, and smart traffic, achieving up to 25 % compute‑cost reduction in Suning’s unmanned stores.

Summary

Deep learning acceleration—through algorithmic improvements, model compression, and hardware optimization—is essential for cost‑effective digital retail, allowing faster training, inference, and lower energy consumption.