Boost Kunpeng CPUs: NUMA Basics and a 5‑Step Performance Tuning Guide

Kunpeng Processor NUMA Overview

With the rapid growth of information, intelligence, and connectivity, computing demand has surged, but power‑wall and cooling limits hinder single‑core performance, making multi‑core architectures essential.

Traditional multi‑core solutions use SMP (Symmetric Multi‑Processing), where each processor has equal status and shared memory access. While SMP offers good load balancing, a common bus becomes a bottleneck as core counts increase.

Figure 1‑1 SMP architecture

Kunpeng processors support NUMA (Non‑Uniform Memory Access) architecture, which overcomes SMP’s scalability limits. In NUMA, cores are grouped into nodes; each node functions like an SMP system, and nodes communicate via an on‑chip network, while inter‑CPU communication uses a high‑bandwidth, low‑latency Hydra Interface.

Memory is physically distributed across nodes, forming a global memory space. Access latency depends on the memory’s proximity to the processor—local memory accesses are faster than remote ones.

Linux has supported NUMA since kernel 2.5, and modern operating systems provide tools and interfaces to optimize and configure near‑memory access.

By properly tuning Kunpeng‑based systems, developers can achieve high performance, eliminate SMP bus bottlenecks, and enjoy stronger multi‑core scalability and flexible computing power.

Figure 1‑2 NUMA architecture

Performance Tuning Five‑Step Method

Performance optimization can be carried out in five steps.

Table 1‑1 General steps for performance optimization

These steps are useful for engineers with limited tuning experience or incomplete hardware knowledge; seasoned experts with deep insight into system bottlenecks may adopt alternative methods.