Can Microcontroller Interrupt Flags Be Buffered? Hardware Limits and Software Workarounds

Problem

When an ISR for interrupt A takes relatively long, a second fast occurrence of the same interrupt can be missed because the hardware only holds a single pending flag.

Hardware Capability

Typical microcontrollers provide only one “pending” flag per interrupt source. The flag is set when the interrupt occurs and cleared by hardware or software. No count of multiple occurrences is stored, so the maximum buffer depth is one.

Software Strategies

To avoid lost events, the ISR should be kept very short (e.g., <5 µs). Common techniques:

At ISR entry, disable the same interrupt source to prevent nesting.

Clear the interrupt flag immediately (hardware‑cleared or write‑to‑clear).

Record the event – e.g., increment a volatile counter or push a record onto a queue.

Re‑enable the interrupt after the flag has been cleared; if another edge occurs while the ISR is running, the hardware will set the flag again, causing the ISR to run a second time after it exits. This gives an effective buffer of one additional event.

Implementation Example

// Example for a generic Cortex‑M MCU
volatile uint32_t irqA_cnt = 0;

void IRQ_A_Handler(void) {
    // 1. Disable further IRQ_A
    NVIC_DisableIRQ(IRQ_A_IRQn);

    // 2. Clear the pending flag (if not auto‑cleared)
    __HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_X);

    // 3. Record the occurrence
    irqA_cnt++;

    // 4. Re‑enable the interrupt
    NVIC_EnableIRQ(IRQ_A_IRQn);
}

The main loop can then process irqA_cnt or dequeue items from a buffer.

Practical Recommendations

Design the ISR to execute in a few microseconds; profile and optimise if it exceeds the expected interrupt period.

Use a volatile counter or a lock‑free queue to transfer events from ISR to background code.

Disable the interrupt at entry and re‑enable after the flag is cleared to obtain a one‑event software buffer.

Accept that true multi‑event hardware buffering is not available on most MCUs; rely on the software technique above when higher event rates are required.