How Floating‑Gate Transistors Store Data: Inside NAND Flash Write/Read Operations

Fundamentals of NAND Flash Cells

NAND flash stores data in floating‑gate transistors . A conventional MOSFET conducts when a high voltage is applied to its gate and turns off at low gate voltage. By adding a floating‑gate layer and a tunneling layer above the channel, the device becomes a floating‑gate transistor, which can trap electrons and thus represent a single bit.

Program (Write 0) Operation

To program a logical 0, a relatively high voltage (typically 15‑20 V) is applied to the control gate while the substrate is held at a lower potential. The strong electric field forces electrons to tunnel through the tunneling oxide into the floating gate. Once trapped, the electrons are isolated by the surrounding insulator, and the cell stores a 0.

Erase (Write 1) Operation

Erasing (writing a logical 1) applies a higher voltage to the substrate (or a negative bias to the gate) so that the trapped electrons are pulled out of the floating gate back through the tunneling layer. After the electrons leave, the floating gate is empty and the cell represents a 1.

Read Operation

Reading detects whether electrons remain in the floating gate.

A low voltage is applied to the control gate. If the floating gate is empty, a conductive channel forms between drain (D) and source (S), allowing current to flow. An ammeter in the circuit registers current → logical 1. If electrons are present, the channel is blocked, no current flows → logical 0.

Matrix Control and Block‑Level Access

NAND flash reads and programs data a page at a time, while erasing occurs at the block level.

In a memory array, two floating‑gate transistors share a common N‑channel and are tied to the same substrate, so operations are performed on whole blocks. The addressing scheme uses row (word‑line) and column (bit‑line) voltages:

Program a 0 : Apply a high voltage (≈20 V) to the selected row, keep the selected column at low voltage. This creates a potential difference that drives electrons into the floating gate of the targeted cell without forming a conductive loop that would short the voltage.

Program a 1 (erase) : Apply the same high voltage to the selected row and also a high voltage to the selected column. The resulting loop prevents electrons from reaching the floating gate, allowing the previously trapped electrons to be removed.

Summary

The floating‑gate transistor is the elementary storage element of NAND flash. Whether electrons are trapped in the floating gate determines the logical state ( 0 = electrons present, 1 = no electrons). Row/column voltage schemes enable page‑wise reads and block‑wise program/erase operations across the array, providing the high density and performance characteristic of modern NAND flash memory.