South Korea's KOSPI surged over 100% this year, with active trading accounts exceeding the population, driven by tax‑free arbitrage, leveraged retail enthusiasm, and a semiconductor boom centered on Samsung and SK Hynix, raising concerns about market fragility.
The article examines Huawei’s newly announced τ (Tau) Law, which proposes scaling semiconductor performance by reducing signal‑propagation delay rather than shrinking transistor geometry, explains its RC‑delay model, logical‑folding technique, multi‑layer optimization framework, and compares it with existing 3D‑stacking approaches, while assessing its practical challenges and industry implications.
Huawei introduced the “τ (Tau) Law” at ISCAS 2026, proposing a shift from geometric scaling to time‑constant reduction to overcome the physical limits of Moore’s Law, and outlines how signal‑propagation delay can be compressed through system‑level innovations such as logical folding and advanced packaging.
At ISCAS 2026, Huawei’s He Tingbo unveiled the “τ Law,” a time‑scaling theory that replaces geometric miniaturization with LogicFolding to cut signal‑travel time, delivering up to 55% higher transistor density, 41% better SoC efficiency, and a portfolio of 381 chips over six years.
Huawei introduced the “τ (Tau) Law” at the 2026 ISC conference, proposing a shift from geometric scaling of Moore’s law to “time miniaturization” that reduces signal propagation delay through logical folding and interconnect redesign, aiming to sustain semiconductor performance as transistor sizes near physical limits.
Huawei’s He Tingbo announced at ISCAS 2026 that Moore’s geometric scaling has reached a physical ceiling and introduced the “Tau Law,” a time‑scaling strategy that leverages multi‑layer optimization, logic folding, and the Lingqu bus to achieve 1.4 nm‑equivalent performance without EUV, outlining a roadmap to 2026 and 2031.
The article introduces Huawei’s “τ Law”, which shifts chip advancement from geometric scaling to time‑constant reduction, explains its four‑layer optimization (device, circuit, chip, system), showcases logic‑folding technology, and outlines a roadmap that could match 1.4 nm performance by 2031 without relying on EUV lithography.
The Chinese GPU market, valued at 1.546 trillion CNY in 2024 and projected to grow over 30% annually, is reshaping as domestic firms like Huawei, Wallin, and Moore Thread adopt 7nm chiplet designs to challenge Nvidia's dominance, while grappling with software ecosystem gaps and supply‑chain constraints.
Apoorv Agrawal’s AI supercycle analysis introduces an A‑shaped three‑layer value‑chain (Semiconductor → Infrastructure → Apps), shows how AI revenue grew from $90 B in 2024 to $435 B in 2026, why the semiconductor layer now captures most profit, and what conditions could flip the structure.
SpaceX plans to build its own AI‑focused GPU using a 2 nm process to meet the extreme thermal, radiation, and performance demands of Starlink satellites and Tesla autonomous driving, while confronting massive capital costs, ecosystem lock‑in, and yield challenges that could make or break the venture.
In October 2024 South Korea surged to the forefront of the AI industry as OpenAI, Anthropic, and major Korean chaebols forged massive investments, secured HBM memory supplies, and launched a national AI economic blueprint, while political deals and talent challenges shaped the country’s strategic position.
Amid US export restrictions, China’s five‑year‑old GPU pioneer Moore Thread is racing to fill the high‑end GPU gap, detailing the technology’s role in AI, its ecosystem strategy, and the significance of its fast‑track IPO for the domestic semiconductor and AI compute landscape.
Jack Kilby’s invention of the integrated circuit in 1958 solved the "Tyranny of numbers" problem by integrating all components onto a single silicon chip, sparking a technological revolution that powered the space race, transformed computing, and reshaped modern electronics.
Amid escalating US export restrictions, Chinese tech giants Alibaba and Baidu are accelerating the development of their own AI chips—Alibaba's self‑designed processors and Baidu's Kunlun P800—to reduce reliance on Nvidia’s H100 and A100, signaling a potential shift in the global AI compute landscape.
The article analyzes the recent market turbulence of Chinese AI chip makers, explains how reconfigurable data‑flow architectures like RPU outperform traditional GPUs, and examines the commercial breakthroughs and strategic implications for China's semiconductor industry in the global AI compute race.
This article provides a comprehensive overview of ASIC technology, covering its definition, origins, design process, key parameters, core techniques, and major application domains such as data centers, AI, automotive, and more, while also comparing it to general‑purpose ICs and highlighting leading industry players.
The article examines CXL interconnect chips—high‑speed, low‑latency devices built on the Compute Express Link protocol—covering their technical fundamentals, supportive policies, industry chain, booming Chinese server market demand, global market forecasts, competitive landscape, and future trends driven by AI and data‑center workloads.
This article provides a comprehensive overview of PCIe interconnect chips, covering their definition, industry classification, development history, policy support, supply‑chain structure, Chinese server market growth, global market size and forecasts, product composition, competitive landscape, and future trends toward higher speeds and lower latency.
The article outlines Intel’s hybrid‑core strategy, detailing the upcoming P‑core generations Lion Cove, Cougar Cove, Coyote Cove, and the 2028 Unified Core, while comparing architectural shifts, performance expectations, and process technologies with AMD’s Zen 5 design.
This article explains what ASIC chips are, how they differ from CPUs, GPUs and FPGAs, classifies them by customization level and function, outlines their performance and cost advantages, discusses their drawbacks, and reviews current products and market trends driving AI hardware adoption.
A US Senate bill introduced by Senator Tom Cotton requires Nvidia, AMD, Intel and other high‑end GPU and AI processor makers to embed geolocation tracking, imposing six‑month compliance deadlines, new reporting obligations, and potentially billions of dollars in added R&D and export‑control costs.
Trump’s administration plans to overturn the Biden-era AI chip export curbs, proposing a streamlined global licensing system that critics say could boost US innovation but also raise security concerns, while market reactions see Nvidia and AMD shares rise and Chinese AI chip development accelerates.
This article translates and analyzes Lennart Heim’s deep dive into Huawei’s Ascend 910C AI accelerator, covering its dual‑chip architecture, packaging trade‑offs, performance versus NVIDIA’s H100 and upcoming B200, mysterious supply‑chain origins, and the broader strategic implications for China’s AI competition.
The 2024 China server CPU industry overview analyzes the dominance of X86 and ARM ecosystems, presents market size growth from 2018 to 2028, examines competitive advantages of domestic vendors, and discusses policy-driven demand and pricing challenges shaping the domestic CPU market.
HBM's near‑memory architecture, stacked design, and TSV integration dramatically cut latency and space while boosting bandwidth, leading NVIDIA and AMD to adopt it across multiple GPU generations, spurring fierce competition among SK Hynix, Samsung, and Micron and projecting a four‑fold market surge to $169 billion by 2024.
This analysis forecasts semiconductor process evolution, advanced packaging growth, and HBM memory capacity through 2025, highlighting TSMC and Samsung’s 2nm/3nm timelines, Nvidia and AMD packaging limits, and the assumptions driving Nvidia’s future AI‑chip architecture.
This article provides a comprehensive overview of ASIC chips, covering their definition, material composition, classification by customization level and application, key advantages and drawbacks, notable product examples, and emerging market opportunities across AI, edge computing, and consumer electronics.
The article explains the concept of integrated chips and chiplets, describes their architecture, the role of silicon interposers, outlines three main performance‑boosting pathways—scaling, new device materials, and chiplet integration— and highlights recent industry examples and standards that illustrate the emerging paradigm.
Shanghai police, with cooperation from Jiangsu authorities, arrested 14 individuals suspected of infringing Huawei's Hi1152 V100 Wi‑Fi chip trade secrets, detailing the seized chips, legal actions, company backgrounds, and the broader implications for semiconductor intellectual‑property security in China.
This white paper surveys the emerging role of terahertz (THz) frequencies—spanning 0.1 THz to 10 THz—in next‑generation 6G wireless systems, outlining the spectrum's unique properties, key research challenges, potential applications, and the measurement techniques needed to model high‑frequency channel behavior.
This article reviews recent decades of CPU performance improvements and semiconductor process advances, explains current CPU architectures, instruction set evolution, and how these trends influence software development practices, including parallelism, SIMD, multithreading, and power‑efficiency considerations.
The 2023 Ethernet switch chip industry report outlines the technology, market structure, business models, development history, value chain, market size, and competitive landscape of commercial and self‑developed Ethernet switch chips, highlighting high entry barriers, concentration among leading vendors, and growth driven by data‑center and digital‑economy demand.
The 2023 Chinese server CPU industry report details the sector’s rapid growth, classification by instruction set architectures, market characteristics, supply chain analysis, size fluctuations, future forecasts, and competitive dynamics among domestic and foreign manufacturers.
This article explains the structure of NAND flash memory, how MOSFETs with floating‑gate and tunneling layers perform write operations for logical 0 and 1, how read operations detect stored electrons, and how matrix control enables block‑level access.
This article provides a comprehensive overview of the storage chip market, detailing the different storage media, memory hierarchy, DRAM/ROM technologies, DDR standards, NAND flash classifications, 3D NAND advancements, and the industry’s supply‑chain structure, while highlighting the emerging domestic substitution trend.
The article analyzes TSMC’s extraordinary growth since its 1994 IPO, highlighting its high profit margins, massive patent portfolio, diverse process technologies, dominant customer base, expanding market share in wafer foundry, massive capital investments, and its pivotal role in the global semiconductor ecosystem.
This report analyzes the role of memory interface chips in modern servers, the transition from DDR4 to DDR5, market penetration forecasts, the technical distinctions between RCD and DB buffers, and emerging standards such as CXL, HBM, and PCIe that shape future high‑performance computing architectures.
The article provides a comprehensive analysis of the AI accelerator chip market, highlighting the dominant position of overseas leaders like Nvidia, AMD and Intel, detailing market share data, and examining the rapid development and competitive strategies of emerging Chinese GPU, GPGPU, and ASIC manufacturers.
The article analyzes the FPGA industry's two historical phases, compares international and Chinese vendors, examines product families, process technologies, market shares, demand trends, and highlights opportunities for domestic substitution and future growth in both hardware and software ecosystems.
The article surveys recent digital‑infrastructure trends, explaining why traditional Moore's Law scaling is slowing, describing More‑Moore and Beyond‑CMOS approaches, and detailing new chip architectures such as DSA, 3D stacking, Chiplet, compute‑in‑memory, and distributed xPU‑centric systems that together address the growing compute demands of AI, AR/VR, and bio‑pharma workloads.
Since Nvidia's CEO highlighted DPUs as the third core chip for data centers in 2020, the technology has rapidly advanced, reshaping semiconductor markets, introducing CPU‑DPU‑GPU task partitioning, and driving a booming ecosystem highlighted by the 2023 DPU Summit in Beijing.
AMD’s new Versal Premium VP1902 FPGA, the world’s largest adaptive SoC, doubles logic capacity over its predecessor, adds extensive high‑speed transceivers, NoC and PCIe upgrades, and promises faster debugging and AI‑driven chip validation, marking a significant shift in semiconductor prototyping.
Chinese researchers used generative AI to design Qǐ Méng 1, the first completely self‑generated CPU chip that runs Linux and rivals early Intel 486 performance, showcasing the rapid rise of AI‑driven semiconductor design.
The article explains how slowing transistor cost reductions and Moore's law have driven the emergence of Chiplet technology, detailing its cost and yield advantages, rapid market growth, and the role of advanced packaging methods such as 3D Fabric, EMIB, and X‑Cube in enabling heterogeneous integration.
The article provides a comprehensive overview of China's power management chip market, detailing its steady growth, market size, classifications, industry characteristics, supply chain analysis, competitive landscape, and offering related downloadable research reports.
The explosive growth of ChatGPT and other AI chatbots is driving unprecedented demand for high‑performance AI chips and high‑bandwidth memory, positioning Nvidia as the primary beneficiary while also creating significant market opportunities for Samsung, SK Hynix, and other semiconductor manufacturers.
This article analyzes how semiconductor design firms can balance compute capacity and cash flow by modeling monthly core‑hour demand across project phases, presenting beginner and experienced algorithms, realistic usage conversion, and strategic choices between local, cloud, and hybrid resources.
The DDR3 niche DRAM market, still worth over $70 billion globally, is shrinking but remains vital for low‑capacity consumer, industrial and automotive applications, while the industry sees major players exiting and Chinese firms expanding their presence amid evolving DDR technologies.
The U.S. added cutting‑edge electronic design automation (EDA) software and related semiconductor technologies to its export control list, prompting concerns about short‑term disruptions and long‑term constraints on China's advanced chip design while also spurring domestic EDA development.
The article chronicles Huawei’s three‑decade evolution from a modest switch reseller to a pioneering 5G baseband chip maker, detailing early ASIC breakthroughs, the Balong series, integration into Kirin SoCs, and the impact of U.S. restrictions on its semiconductor strategy.
Based on recent leaks from 3DCenter.org and two prominent Twitter insiders, this analysis predicts launch windows, product codes, performance tiers, pricing pressures and power‑draw concerns for Nvidia’s upcoming RTX 4000 series and AMD’s RDNA 3 GPUs, while warning that the information remains speculative.
In 2022, many former internet professionals are redirecting their careers toward high‑potential sectors such as new energy, semiconductor manufacturing, and Web3, attracted by strong salary growth, abundant talent demand, and the promise of emerging technologies despite uncertainties and transitional challenges.
The article examines ASML CEO Peter Wennink's claim that industrial groups are buying washing machines to extract semiconductor components, analyzes the underlying data on ASML's Q1 2022 performance, explores the technical feasibility of recycling washing‑machine chips, and places the discussion within the broader context of the worldwide chip shortage and its impact on supply chains.
The article explains how chiplet technology, as a modular semiconductor IP solution, reduces design cost and time, expands market opportunities, and faces challenges such as standardization, packaging testing, and software integration, while outlining its market outlook and impact on business models.
Despite the hype around new imaging chips like OPPO's Marianas X, the article explains why smartphone makers struggle to develop full‑featured processors, detailing the technical complexity, massive R&D investment, costly tape‑outs, and the necessity of extensive ecosystem integration.
The Russia‑Ukraine war is jeopardizing the semiconductor supply chain by threatening the availability and price stability of neon gas, a critical material for deep‑ultraviolet lithography, while also highlighting broader risks to chip manufacturing and related cyber‑security concerns.
An extensive analysis traces the evolution of CPU architectures—from early Intel 4004 to modern x86, ARM, RISC‑V and MIPS—examining their technical differences, market shares, recent performance gains, and the shifting competitive landscape across servers, desktops, mobile devices, and emerging IoT applications.
The 2021 China DPU Industry Development White Paper outlines DPU’s key use cases across data centers, cloud, security, AI, edge, storage and streaming, analyzes the competitive landscape among major vendors, and projects rapid global and Chinese market growth through 2025.
The article provides a comprehensive analysis of China's domestic CPU ecosystem, examining the technical distinctions between architectures and instruction sets, the security implications of relying on foreign designs, and the strategic balance needed between indigenous development and imported technologies to advance the nation's semiconductor industry.
The article defines System‑on‑Chip (SoC), outlines its key components and advantages, presents market size data showing rapid growth from 2017 to 2023, reviews the technology’s origins in the mid‑1990s, and highlights emerging trends such as the convergence of SoC, MEMS and SiP technologies.
This article provides a comprehensive analysis of CPU architecture evolution, workflow, historical milestones, CISC versus RISC competition, the emergence of RISC‑V, China's domestic processor initiatives, and current market share trends across servers, desktops, and mobile devices.
Amid global chip shortages and shifting market dynamics, Chinese internet powerhouses like ByteDance, Tencent, and Xiaomi, alongside global players such as Google, Intel, and Nvidia, are accelerating their own semiconductor initiatives, reshaping the industry from smartphone SoCs to AI‑focused cloud processors.
The article provides a comprehensive overview of the rapidly growing IoT ecosystem, covering market size forecasts, the impact of 5G, edge intelligence, AIoT, the four-layer IoT architecture, and a detailed competitive landscape of more than 300 sensor, chipset and platform companies.
An in‑depth guide walks you through every stage of CPU production—from extracting pure silicon from sand, melting and shaping ingots, slicing wafers, applying photoresist, performing photolithography, ion implantation, metal layering, testing, and final packaging—revealing the complex, multi‑billion‑dollar process behind modern processors.
This report analyzes the evolution of processor chips, the rise of heterogeneous computing, and provides a comprehensive GPU investment logic framework, detailing GPU architecture, market competition, global industry landscape, and the challenges and prospects of domestic GPU development in China.
The article examines how AMD, NVIDIA, and Intel are expanding their high‑performance computing portfolios through acquisitions and product development, focusing on FPGA, AI accelerators, and cloud‑centric strategies, and evaluates the technical and market implications of these moves.
An overview of the CPU’s pivotal role in IT systems leads into a four‑point framework for domestic processors, covering ARM’s market dominance, the semiconductor supply chain, three development pathways—X86 licensing, ARM licensing, and self‑designed architectures—and the security‑driven outlook shaping China’s future CPU landscape.
The article provides a comprehensive overview of the open‑source RISC‑V instruction set, its historical development, technical benefits such as modularity and a minimal instruction set, and its growing relevance across IoT, mobile, server, storage, AI, and security domains, while also discussing ecosystem challenges and industry initiatives.
The article analyzes the current X86 market dominance of Intel, AMD's growing share and Zen CPU roadmap, details AMD's strategic spin‑offs and fabless collaborations, and examines how Chinese companies are leveraging Zen architecture for domestic processor development.
The article chronicles how 5G and AI are reshaping global manufacturing, how US sanctions crippled Huawei’s chip supply, and how visionary leader Zhang Rujing built China’s semiconductor industry from scratch, turning SMIC into a lifeline for domestic chip production.
This article provides a comprehensive analysis of the BIOS and BMC firmware ecosystem, covering technical fundamentals, the value chain from CPU to end devices, market size estimates, major global and Chinese vendors, and the risks and investment opportunities shaping the industry.
This article summarizes recent developments across data‑center, cloud, 5G, edge, AI, security, automotive and aerospace sectors, including new partnerships, product launches, government contracts, and emerging threats shaping the pervasive computing landscape.
This article traces Huawei’s three‑decade journey from its modest 1991 chip beginnings to a diversified portfolio of five major series—Kirin, Kunpeng, Ascend, Balong/Tiangang, Boudica/Lingxiao, and Honghu—detailing their technical evolution, market impact, and future roadmap across mobile, compute, AI, 5G, IoT, and video domains.
This article presents a detailed survey of Huawei’s three‑decade chip development journey, outlining the evolution of its five major chip families—including Kunpeng, Ascend, Kirin, Balong/Tianang, Boudica/Lingxiao, and Honghu—while highlighting key technical specifications, market impact, and future prospects.
This weekly roundup covers a 20% surge in cloud service revenue, Google's new pQRNN model rivaling BERT, China's first NFC chip stamp, TSMC's 3nm capacity boost, Intel's IoT‑focused processors, Apple's open‑source Swift System for Linux, a novel FGPM adversarial text method, and multimodal translation advances, highlighting key trends across cloud, AI, and hardware.
This article traces the evolution of Chinese domestic CPUs, examines the major manufacturers such as Feiteng, Kunpeng, Haiguang, Loongson, Zhaoxin, and Shenwei, and analyzes their architectures, performance, ecosystem, and market impact within the broader semiconductor industry.
The article provides a comprehensive overview of FPGA technology, its hardware architecture, advantages over ASIC, and its expanding role in 5G, AI, automotive, and data‑center applications, while analyzing global market dynamics, domestic challenges, and future development trends.
This article chronicles the development of the x86 and ARM ecosystems, detailing early competitors, strategic alliances, technological shifts, market battles, and future trends that have shaped the semiconductor industry and the broader computing landscape.
This article provides a comprehensive, illustrated guide to the entire manufacturing workflow of an Intel Core i7 CPU—from raw silicon extraction and purification, through photolithography, doping, and multilayer metal deposition, to testing, packaging, and future architectural outlooks including x86 limitations and the rise of RISC‑V and the RIOS lab.
This article chronicles the origins of ARM from its 1978 Cambridge roots, the development of RISC architecture, the strategic shift to IP licensing, and how ARM's low‑power designs propelled it to dominate mobile, IoT, and computing ecosystems worldwide.
The closure of Guizhou’s Huaxintong highlights the high risk of semiconductor ventures, the need for companies and governments to admit failure, and why courage to cut losses and tolerate setbacks is essential for a sustainable chip industry in China.
The article analyzes the growing bottlenecks in compute architecture and memory, explores high‑bandwidth communication, near‑data processing, and in‑memory computing techniques, evaluates their advantages, challenges, and future prospects, and highlights key industry players driving the shift toward integrated compute‑storage chips.
The article analyses how China’s semiconductor sector struggles against entrenched Western dominance, chronic equipment and talent shortages, limited funding, and restrictive export controls, while highlighting recent government investments and the strategic importance of closing these gaps for national security and technological independence.
Deep neural networks, propelled by breakthroughs such as AlexNet and advances in GPU and TPU hardware, are rapidly moving from academic research into diverse applications—including earthquake prediction, medical imaging, and autonomous driving—driving massive industry investment, new semiconductor designs, and intense competition among tech giants and startups.
At the 2018 Hangzhou Yunqi Conference, Alibaba's CTO Zhang Jianfeng outlined DAMO Academy’s expansive AI strategy, unveiling new research labs, a semiconductor venture, quantum computing initiatives, and a youth science award aimed at accelerating data, algorithm, and computing breakthroughs.
At the 2018 Hangzhou Cloud Expo, Alibaba’s CTO and Damo Academy director Zhang Jianfeng unveiled the institute’s global expansion, new semiconductor venture, AI research pillars, upcoming NPU chip, quantum computing initiatives, and the youth-focused Damo Academy Green Orange Award, highlighting a comprehensive strategy for data, algorithms, and computing power.
The article offers a comprehensive, historically grounded analysis of the x86 and ARM ecosystems, tracing their origins, competitive battles, technical innovations, market shifts, and future challenges while highlighting why software ecosystems, licensing models, and emerging technologies shape CPU dominance.
This article chronicles the 120‑year evolution of DRAM memory from early magnetic drums to modern 3D NAND, detailing the intense economic battles among the United States, Japan, South Korea, Taiwan, and China that shaped the highly monopolized semiconductor storage market.
From raw sand to the final packaged processor, this article walks through each step of CPU fabrication—including silicon purification, wafer creation, photolithography, ion implantation, metal deposition, testing, and packaging—revealing the intricate technologies that transform elemental silicon into the world’s most powerful integrated circuits.
This article walks through the complete semiconductor manufacturing flow, from raw quartz to polished silicon wafers, photolithography, ion implantation, metal deposition, testing, die cutting, packaging, and final grading, revealing why CPUs are the most integrated, un‑replicable chips in modern technology.
The article examines SoftBank’s £23.4 billion cash offer for ARM, exploring Masayoshi Son’s entrepreneurial mindset, the strategic reasons behind the deal, its implications for the Internet of Things, the broader semiconductor industry, and how competitors might respond to this transformative acquisition.
