How FPGA Acceleration Supercharges X-Engine’s Compaction for 10× MySQL Performance
This article introduces Alibaba’s X‑Engine storage engine, the foundation of the next‑generation distributed database X‑DB, and explains how FPGA‑accelerated compaction and asynchronous scheduling dramatically improve write‑intensive OLTP performance, reduce CPU contention, and achieve up to 50 % throughput gains while maintaining fault tolerance.
Introduction
X‑Engine is the next‑generation storage engine developed by Alibaba’s Database Business Unit and the core of the distributed database X‑DB. It aims for 10× MySQL performance with 1/10 storage cost by combining cutting‑edge software and hardware techniques, including FPGA acceleration for compaction.
Background
Alibaba’s OLTP workload processes billions of writes daily, with write‑intensive traffic during events like Double‑11 reaching millions of TPS. The workload features high write ratios (read/write ≈ 3:1) and hot‑data concentration where newly written records receive 99 % of accesses within seven days.
To meet these demands, X‑Engine adopts LSM‑Tree‑like design, maintaining multiple memtables in memory, flushing them as immutable SSTables, and performing periodic compaction to merge SSTables and reclaim space.
Challenges of Compaction
Compaction is CPU‑ and I/O‑intensive, causing performance cliffs when it competes with transaction processing. Traditional CPU‑only compaction can consume up to 60 % of CPU resources on SSD‑based systems, leading to periodic performance drops.
FPGA‑Accelerated Compaction
FPGA is used to offload compaction tasks, providing a ten‑fold speedup over single‑threaded CPU compaction. The design follows a mixed architecture where the FPGA acts as a co‑processor connected via PCIe, allowing asynchronous data transfer and processing.
The FPGA compaction pipeline consists of:
Decoder modules to decompress KV pairs.
KV Ring Buffers for flow control.
KV Transfer and Key Buffer for key comparison.
Compaction Processing Engine (PE) that merges keys.
Encoder to recompress merged KV pairs.
Controller to coordinate pipeline stages.
Multiple Compaction Units (CUs) operate in parallel, each handling up to four concurrent streams.
Asynchronous Scheduling
Because FPGA compaction requests take milliseconds, a synchronous scheduler would cause excessive thread switching. An asynchronous scheduler builds compaction tasks, pushes them to a Task Queue, and lets a thread pool assign tasks to available CUs. Completed tasks are placed in a Finished Queue; failed tasks are retried on the CPU.
Fault‑Tolerance Mechanism
Three error sources are addressed:
Data corruption during DMA transfer detected via CRC checks.
FPGA internal errors (single‑event upsets) mitigated by duplicate CUs and bitwise result comparison.
Illegal input data rejected by length checks.
Failed tasks are re‑executed on the CPU to guarantee correctness.
Experimental Evaluation
Experiments were conducted on a 64‑core Intel Xeon E5‑2682 v4 server with 128 GB RAM, 40 GB memtable, and a Xilinx VU9P FPGA. Benchmarks included DbBench (write‑only, mixed, YCSB), TPC‑C, and SysBench, comparing X‑Engine‑CPU (CPU compaction) with X‑Engine‑FPGA (FPGA compaction).
Key results:
FPGA compaction throughput exceeds CPU single‑threaded throughput for all KV lengths.
Throughput improves by ~40 % in write‑only workloads and up to 50 % in mixed read/write workloads.
Performance drops caused by compaction are reduced from >30 % (CPU) to ~20 % (FPGA) in YCSB.
Across connection scales (128–1024), FPGA provides 10‑15 % additional throughput.
Figures illustrate performance curves and hardware architecture.
Conclusion
The FPGA‑accelerated X‑Engine achieves up to 50 % KV‑interface and 40 % SQL‑interface performance gains, especially for write‑heavy workloads. The fault‑tolerance design ensures reliability despite FPGA errors, delivering a high‑availability hybrid storage engine suitable for Alibaba’s production workloads.
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