Introducing NVIDIA DOCA GPUNetIO: GPU‑Initiated Communication for Real‑Time Packet Processing

The article explains how the new NVIDIA DOCA GPUNetIO library overcomes limitations of earlier DPDK solutions by enabling GPU‑centric packet‑processing applications.

Real‑time packet processing on the GPU is useful for signal processing, network security, data collection, and input reconstruction, aiming for an inline pipeline that receives packets directly into GPU memory, processes them with one or more CUDA kernels, and then forwards results.

Traditional CPU‑centric pipelines make the CPU the coordinator, synchronizing NIC activity with GPU processing, which becomes a bottleneck at high traffic rates (e.g., 100 Gbps) due to CPU resource consumption, lack of scalability, and platform dependence.

GPU‑initiated communication removes the CPU from the critical path: the GPU can directly control the NIC, receiving packets straight into its memory and starting processing immediately. This is achieved by exposing NIC registers to the GPU and allowing CUDA kernels to configure them.

The NVIDIA DOCA GPUNetIO library, part of the DOCA SDK, introduces GPU‑initiated communication, precise send scheduling, GPUDirect RDMA, semaphores for low‑latency messaging, and direct CPU access to CUDA memory. It requires a GPUDirect‑friendly platform where the GPU and NIC are connected via a dedicated PCIe bridge.

Key GPUNetIO features include:

GPU‑initiated communication via CUDA device functions.

Timestamp‑based precise send scheduling.

GPUDirect RDMA for zero‑copy packet transfer.

Semaphores for synchronization between CPU, GPU, and CUDA kernels.

Direct CPU access to CUDA memory buffers.

A typical GPUNetIO application follows these steps: initialize GPU and NIC devices, create receive/send queues, define flow rules, launch CUDA kernels, and use GPUNetIO device functions for packet I/O and semaphore interaction.

Several pipeline layouts are described:

CPU receive / GPU process: CPU receives packets into GPU memory, notifies CUDA kernels via semaphores, and the GPU processes them.

GPU receive / GPU process (multi‑kernel): Separate CUDA kernels handle reception and processing, enabling parallel handling of multiple queues.

GPU receive / GPU process (single‑kernel): One CUDA kernel both receives and processes packets, simplifying the design at the cost of potential latency between receive operations.

GPU receive / GPU process / GPU send: A full pipeline where the GPU also constructs and transmits packets without CPU involvement.

Performance results from a reference application show zero packet loss at ~100 Gbps for IP checksum verification, HTTP filtering, and traffic‑forwarding workloads on both a Dell PowerEdge R750 with a BlueField‑2X DPU and a separate sender system.

The article also covers the NVIDIA Aerial SDK for 5G L1, which leverages GPU‑centric processing to handle massive numbers of radio units (RUs). By moving the entire control path to the GPU via DOCA GPUNetIO, the solution achieves scalable, low‑latency packet handling and precise transmission scheduling required by 5G timing constraints.

Early‑access information notes that GPUNetIO is experimental, available for installation on host systems or DPU cards, and requires a ConnectX‑6 Dx (or newer) NIC, a Volta‑class GPU (or newer), Ubuntu 20.04+, CUDA 11.7+, and MOFED 5.8+.