BestHub
Sign in
Architects' Tech Alliance
Author

Architects' Tech Alliance

Sharing project experiences, insights into cutting-edge architectures, focusing on cloud computing, microservices, big data, hyper-convergence, storage, data protection, artificial intelligence, industry practices and solutions.

2.2k
Articles
0
Likes
4.0k
Views
0
Comments
Recent Articles

Latest from Architects' Tech Alliance

100 recent articles max
Architects' Tech Alliance
Architects' Tech Alliance
Apr 28, 2026 · Information Security

Why Compute Power Gets You In, but Security Determines Survival—HaiGuang’s Two Game‑Changing Moves

The article analyzes the rapid expansion of AI compute demand, the shift toward domestic chip dominance, emerging security threats such as data poisoning, and HaiGuang’s hardware‑level “intrinsic security” architecture—including a full‑stack cryptographic platform and a trusted data space—to make AI systems both usable and secure for critical industries.

AI computeChinese semiconductordata poisoning
0 likes · 6 min read
Why Compute Power Gets You In, but Security Determines Survival—HaiGuang’s Two Game‑Changing Moves
Architects' Tech Alliance
Architects' Tech Alliance
Apr 27, 2026 · Artificial Intelligence

Why Huawei’s Ascend 950 PR and DT Have Different Names – The Technical Rationale

Huawei’s Ascend 950 series splits a single die into two variants—PR (Prefill & Recommendation) optimized for compute‑intensive inference with low cost, and DT (Decode & Training) tuned for memory‑bandwidth‑heavy generation and training—illustrating a scenario‑driven, P/D‑separated architecture that maximizes efficiency.

AI chipAscend 950Decode
0 likes · 5 min read
Why Huawei’s Ascend 950 PR and DT Have Different Names – The Technical Rationale
Architects' Tech Alliance
Architects' Tech Alliance
Apr 25, 2026 · Artificial Intelligence

Google’s 8th‑Gen TPU Splits Training and Inference – A Direct Challenge to Nvidia’s One‑Chip Dominance

At Next 2026 Google unveiled the 8th‑generation TPU, separating training and inference into two dedicated chips—TPU 8t with 121 ExaFLOPS for massive models and TPU 8i with ultra‑low latency memory—while boosting performance, efficiency, and ecosystem support, signaling a shift toward specialized AI hardware and intensifying competition with Nvidia.

AI AcceleratorsAI hardwareGoogle TPU
0 likes · 9 min read
Google’s 8th‑Gen TPU Splits Training and Inference – A Direct Challenge to Nvidia’s One‑Chip Dominance
Architects' Tech Alliance
Architects' Tech Alliance
Apr 25, 2026 · Artificial Intelligence

How Domestic Claw Platforms Are Winning the AI Agent Entry Battle

The article analyzes OpenClaw’s shift from GUI to API, its continuous workflow capabilities, the competition for high‑frequency user scenarios, the prospect of per‑device Claw instances, data‑context security concerns, and the potential fragmentation of SaaS software in the emerging AI agent market.

AI AgentAPIChina
0 likes · 12 min read
How Domestic Claw Platforms Are Winning the AI Agent Entry Battle
Architects' Tech Alliance
Architects' Tech Alliance
Apr 24, 2026 · Industry Insights

Full-Stack Software‑Hardware Co‑Design Redefines China's AI Compute Landscape

The 2026 HaiGuang AI Software Ecosystem Summit in Zhengzhou revealed a decisive industry shift from peak‑performance chip bragging to system‑level effective compute, emphasizing full‑stack software‑hardware collaboration, heterogeneous scheduling, and open architecture as the key to unlocking trillion‑parameter AI models.

AI computeChina AI ecosystemMLPerf
0 likes · 5 min read
Full-Stack Software‑Hardware Co‑Design Redefines China's AI Compute Landscape
Architects' Tech Alliance
Architects' Tech Alliance
Apr 24, 2026 · Artificial Intelligence

DeepSeek V4 Launches with 1M‑Token Context, Dual Versions and Native Chinese Chip Support

On April 24, 2026 DeepSeek released the V4 preview featuring two models—V4‑Pro with a 1.6 T‑parameter MoE architecture and V4‑Flash with 284 B parameters—both offering 1 million token context, up to 384 K output tokens, new step‑wise reasoning modes, and full native compatibility with Huawei Ascend and Cambricon chips, while delivering major efficiency gains and benchmark‑leading performance.

1M token contextCambriconDeepSeek
0 likes · 7 min read
DeepSeek V4 Launches with 1M‑Token Context, Dual Versions and Native Chinese Chip Support
Architects' Tech Alliance
Architects' Tech Alliance
Apr 24, 2026 · Industry Insights

TSMC 2026 Roadmap Reveals A12 (1.2nm), A13 (1.3nm) and N2U Nodes

At the 2026 North America Technology Forum, TSMC unveiled a complete 2026‑2029 process roadmap, naming the A12 (1.2nm) and A13 (1.3nm) nodes, adding the N2U extension, and announcing that no High‑NA EUV will be required through 2029, signaling a dual‑track strategy for mobile and AI/HPC workloads.

AI chipAdvanced ProcessHPC
0 likes · 8 min read
TSMC 2026 Roadmap Reveals A12 (1.2nm), A13 (1.3nm) and N2U Nodes
Architects' Tech Alliance
Architects' Tech Alliance
Apr 23, 2026 · Artificial Intelligence

ChatGPT Images 2.0 Unleashes Terrifyingly Real Synthetic Images – How It Works and What Risks It Brings

OpenAI launched ChatGPT Images 2.0, a model that scores 242 on Image Arena, can generate photorealistic scenes, accurately render text and layouts, and even fabricate social‑media posts, financial receipts, and academic papers, raising a severe trust crisis for visual information.

AI image generationChatGPT Images 2.0OpenAI
0 likes · 9 min read
ChatGPT Images 2.0 Unleashes Terrifyingly Real Synthetic Images – How It Works and What Risks It Brings