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Architects' Tech Alliance

Sharing project experiences, insights into cutting-edge architectures, focusing on cloud computing, microservices, big data, hyper-convergence, storage, data protection, artificial intelligence, industry practices and solutions.

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Architects' Tech Alliance
Architects' Tech Alliance
Oct 25, 2026 · Fundamentals

PCIe 6.0 Migration: Tackling PAM4 Signal Integrity, Equalization Complexity, and Test Maturity Gaps

The article details the technical risks and a six-step engineering sequence for migrating from PCIe 5.0 (32 GT/s NRZ) to 6.0 (64 GT/s PAM4), covering 6 mV eye-height vulnerability, FFE/DFE/CTLE equalization explosion, evolving SigTest/PAM4 BERT toolchains, stressed-eye calibration complexity, living CEM/ECN specs, and backward-compatibility validation across NRZ and PAM4 modes.

PAM4PCIe 6.0PHY design
0 likes · 5 min read
PCIe 6.0 Migration: Tackling PAM4 Signal Integrity, Equalization Complexity, and Test Maturity Gaps
Architects' Tech Alliance
Architects' Tech Alliance
Oct 24, 2026 · Artificial Intelligence

China Mobile's Open Disaggregated Supernode (ODS) Architecture for AI Compute

China Mobile Cloud unveils its Open Disaggregated Supernode (ODS) architecture, addressing five core challenges of traditional AI supernodes — hardware lock-in, proprietary interconnects, power/cooling limits, scale constraints, and maintenance complexity — through hardware disaggregation, open Ethernet/RoCE/FARE protocols, and optical circuit switching, achieving 50-90% power and cost reductions while enabling multi-vendor GPU clusters up to 128 cards per pod.

AI supernodeChina Mobile CloudFARE
0 likes · 6 min read
China Mobile's Open Disaggregated Supernode (ODS) Architecture for AI Compute
Architects' Tech Alliance
Architects' Tech Alliance
Oct 22, 2026 · Information Security

China Security Evaluation 2026 No.3: CPUs Reach Level III for First Time, Printer Controller Chips Debut

China's Information Security Evaluation Center released its 2026 third batch of security and reliability results, with 7 CPUs (3 at Level III, 4 at Level II), 2 AI chips, 4 printer controller chips, 2 server OSes, and 3 centralized databases certified — marking the first appearance of CPUs at Level III and first publication of printer controller chip results.

AscendGalaxy KylinKunpeng
0 likes · 4 min read
China Security Evaluation 2026 No.3: CPUs Reach Level III for First Time, Printer Controller Chips Debut
Architects' Tech Alliance
Architects' Tech Alliance
Oct 20, 2026 · Artificial Intelligence

Supernode Scale-Up Interconnects: 15x Bandwidth, 70% Latency Cut for AI Training

Nanjing University's analysis of supernode scale-up interconnect systems reveals how NVLink evolution and domestic solutions like Huawei CloudMatrix384 reduce AI training communication overhead from 37% to 16%, delivering 15x bandwidth gains and 70% latency reduction over scale-out clusters.

AI TrainingCommunication OverheadHuawei CloudMatrix
0 likes · 6 min read
Supernode Scale-Up Interconnects: 15x Bandwidth, 70% Latency Cut for AI Training
Architects' Tech Alliance
Architects' Tech Alliance
Oct 20, 2026 · Industry Insights

DeepSeek Ban Reveals US Strategic Anxiety Beyond Data Security

The US DHS banned DeepSeek from federal civilian agencies citing data jurisdiction risks, but the move reflects deeper fears about China's low-cost open-source AI models undermining US technological dominance and creating independent ecosystems beyond American control.

AI policyDeepSeekUS-China tech competition
0 likes · 8 min read
DeepSeek Ban Reveals US Strategic Anxiety Beyond Data Security
Architects' Tech Alliance
Architects' Tech Alliance
Oct 19, 2026 · Industry Insights

Heterogeneous Computing Powers AI for Science: Sugon 8000's 10 Frontier Breakthroughs

The article analyzes why heterogeneous CPU-accelerator architecture is essential for AI for Science (AI4S), detailing ten frontier applications on Sugon 8000's 100,000-card cluster that demonstrate superior performance in weather forecasting, molecular dynamics, quantum-supercomputing collaboration, and rocket plume simulation, overcoming traditional CPU-only bottlenecks.

AI4SSugon 8000heterogeneous computing
0 likes · 15 min read
Heterogeneous Computing Powers AI for Science: Sugon 8000's 10 Frontier Breakthroughs
Architects' Tech Alliance
Architects' Tech Alliance
Oct 19, 2026 · Industry Insights

Server CPU & AI Accelerator Market Shift: ARM Surges, x86 Retreats, Custom Silicon Challenges Nvidia

Bank of America research projects the server CPU market will grow from $35B to $210B by 2030, with ARM capturing 47% share while Intel falls to 22%; AI accelerator deployments will quadruple to 55.7 GW, but Nvidia's share erodes as hyperscalers deploy custom ASICs like TPU, Trainium, and Maia.

AI AcceleratorsARM ArchitectureCustom ASICs
0 likes · 8 min read
Server CPU & AI Accelerator Market Shift: ARM Surges, x86 Retreats, Custom Silicon Challenges Nvidia
Architects' Tech Alliance
Architects' Tech Alliance
Oct 18, 2026 · Artificial Intelligence

HBF High-Bandwidth Flash for LLM Inference: Simulation Reveals Benefits and Hard Technical Barriers

This article evaluates High Bandwidth Flash (HBF) as a supplement to HBM for LLM inference through simulation, showing HBF can reduce GPU count and boost throughput for long-context and MoE models, but identifies three critical barriers: read bandwidth must match HBM, flash endurance needs 25× improvement, and write latency must be lowered for practical deployment.

HBFHBMHigh Bandwidth Flash
0 likes · 6 min read
HBF High-Bandwidth Flash for LLM Inference: Simulation Reveals Benefits and Hard Technical Barriers