Mastering STM32 NVIC Interrupt Priority Groups: A Practical Guide

Background

STM32 provides 43 configurable interrupt channels. The AIRC (Application Interrupt and Reset Register) contains a 4‑bit field used to assign both pre‑emptive priority and sub‑priority for each interrupt. The STM32 firmware library defines a set of constants that represent different priority‑group configurations.

Priority Group Definitions

#define NVIC_PriorityGroup_0 ((u32)0x700) /* 0 bits for pre‑emptive priority, 4 bits for sub‑priority */
#define NVIC_PriorityGroup_1 ((u32)0x600) /* 1 bit for pre‑emptive priority, 3 bits for sub‑priority */
#define NVIC_PriorityGroup_2 ((u32)0x500) /* 2 bits for pre‑emptive priority, 2 bits for sub‑priority */
#define NVIC_PriorityGroup_3 ((u32)0x400) /* 3 bits for pre‑emptive priority, 1 bit for sub‑priority */
#define NVIC_PriorityGroup_4 ((u32)0x300) /* 4 bits for pre‑emptive priority, 0 bits for sub‑priority */

Conceptual Visualization

Think of the 43 interrupt sources as people. The pre‑emptive priority is like a social class ("阶级"), while the sub‑priority is a rank within that class ("阶层"). A higher class can interrupt a lower one, creating nested interrupts. Within the same class, the sub‑priority determines the order when two interrupts occur simultaneously.

Configuration Examples

Using NVIC_PriorityGroup_4 (16 pre‑emptive priorities, no sub‑priority)

NVIC_InitStructure.NVIC_IRQChannel = EXTI0_IRQChannel; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 8; // 0‑15 range

Here EXTI0 is placed in pre‑emptive priority level 8. Since there is no sub‑priority, any interrupt with a lower pre‑emptive level can be pre‑empted by this one.

Using NVIC_PriorityGroup_3 (8 pre‑emptive priorities, 2 sub‑priorities each)

NVIC_InitStructure.NVIC_IRQChannel = EXTI0_IRQChannel; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3; // 0‑7 range NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; // 0‑1 range

Another interrupt, EXTI9_5, can be configured as:

NVIC_InitStructure.NVIC_IRQChannel = EXTI9_5_IRQChannel; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;

Both belong to the same pre‑emptive class, so they cannot pre‑empt each other; the one with the higher sub‑priority (value 1) will be serviced first when they occur together.

For USART1 with the highest priority in this group:

NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQChannel; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;

USART1 can interrupt both EXTI0 and EXTI9_5 because its pre‑emptive priority is higher.

Step‑by‑Step Configuration Procedure

Set the priority group : Call NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup) with one of the constants above, e.g., NVIC_PriorityGroupConfig(NVIC_PriorityGroup_0) for the 0‑group configuration.

Prepare the initialization structure :

typedef struct {
    uint8_t NVIC_IRQChannel;
    uint8_t NVIC_IRQChannelPreemptionPriority; // pre‑emptive priority
    uint8_t NVIC_IRQChannelSubPriority;       // sub‑priority
    FunctionalState NVIC_IRQChannelCmd;
} NVIC_InitTypeDef;

Fill the structure with the desired channel and priorities , then initialize the interrupt: NVIC_Init(&EXTI_NVIC_InitStructure); Enable or disable global interrupts by manipulating the CPU priority mask:

/* Disable all interrupts */
void NVIC_SETPRIMASK(void);
void NVIC_SETFAULTMASK(void);

/* Enable all interrupts */
void NVIC_RESETPRIMASK(void);
void NVIC_RESETFAULTMASK(void);

/* Typical usage */
NVIC_SETPRIMASK();   // Disable interrupts
NVIC_RESETPRIMASK(); // Enable interrupts

These functions must be used in matching pairs to avoid leaving the processor in an unintended state.