What Every Engineer Should Know About Semiconductor Memory Types

Introduction

Semiconductor memory is essential in virtually every system that contains a processor. Memory technologies evolve to meet higher performance, capacity, and power‑efficiency requirements.

Classification by Volatility

Memory devices are divided into Non‑Volatile (retain data after power loss) and Volatile (lose data when power is removed).

Classification by Operation

Based on operation, memories fall into two major groups: RAM (Random Access Memory) and ROM (Read‑Only Memory). RAM allows fast read/write of individual cells, while ROM stores fixed programs and data.

ROM and Its Variants

ROM stores firmware, BIOS, and other immutable code. Common variants are:

PROM : One‑time programmable; a high‑voltage pulse burns fuses to permanently store bits.

EPROM : Erasable by exposing a quartz window to UV light, which clears the stored charge.

EEPROM : Electrically erasable and programmable; uses a floating‑gate (FLOTOX) structure that allows byte‑level erase and rewrite without removing the chip.

EEPROM is typically accessed via an I²C bus and is used for board identification, temperature thresholds, and other low‑capacity non‑volatile data.

Flash Memory

Flash, introduced in 1984, erases data in block units rather than bytes, providing faster erase cycles and higher endurance (over 1 000 000 cycles). Two main families exist:

NOR Flash : Random‑access code storage (e.g., BIOS). Supports byte‑level reads.

NAND Flash : High‑density storage (up to 32 Gb per chip) used in USB drives, SSDs, and other mass‑storage applications.

Both NOR and NAND Flash rely on Fowler‑Nordheim tunneling to move charge in and out of the floating gate.

Static RAM (SRAM)

SRAM retains data as long as power is supplied, offering low latency and fast access. Typical cell designs use six transistors (6T). Variants include:

Asynchronous SRAM : Operates independently of a clock.

Synchronous SRAM : All accesses are synchronized to a clock edge.

ZBT SRAM : Zero Bus Turnaround; eliminates idle cycles between read and write operations.

QDR/DDR SRAM : Quad‑Data‑Rate or Double‑Data‑Rate designs that provide higher bandwidth by separating read and write ports.

Dynamic RAM (DRAM)

DRAM stores each bit in a capacitor that must be refreshed periodically. Major families are:

SDRAM : Synchronous DRAM that works with a clock signal.

DDR SDRAM : Transfers two data words per clock cycle (double data rate).

DDR2 : Uses a 4‑prefetch architecture, lower voltage, and higher transfer rates.

DDR3 : 8‑prefetch, 1.5 V operation, and data rates up to 1600 Mbps.

RLDRAM / RLDRAM II : Reduced‑latency DRAM for networking and cache applications; features more banks and separate row/column address paths.

Selection Considerations

Choosing the appropriate memory technology requires balancing bandwidth, capacity, latency, power consumption, and cost. Tables in the original source compare these metrics across technologies.

References

https://en.wikipedia.org/wiki/Non-volatile_random-access_memory

https://en.wikipedia.org/wiki/Read-only_memory

http://computer.howstuffworks.com/ram.htm

http://www.radio-electronics.com/info/data/semicond/memory/different-types-semiconductor-memory.php

http://people.ee.duke.edu/~jmorizio/ece261/classlectures/Memory_design.pdf

http://www.csun.edu/edaasic/roosta/ECE595_Chap4.pdf

http://searchstorage.techtarget.com/definition/flash-memory

Selecting the Right High‑Speed Memory Technology for Your System