What Nvidia’s New Blackwell & Rubin GPUs Reveal About the Future of AI Compute

Nvidia’s GTC conference in Washington refined the AI compute technology roadmap, previewing the next‑generation Vera Rubin architecture and reinforcing confidence in the execution of its roadmap. The company also emphasized progress on US‑localised manufacturing and showcased accelerated‑compute applications in communications infrastructure, quantum computing, autonomous driving, and robotics.

The Blackwell and Rubin platforms together target the shipment of 600,000 GPUs, with an estimated total of 2,000,000 GPUs by CY25‑26, generating revenue exceeding $500 billion and representing a five‑fold increase over previous generations.

The roadmap splits compute products into two families: Context GPUs and Generation GPUs. Context GPUs, exemplified by the Rubin CPX, adopt a Prefill‑Decode separated architecture that reduces cost through compute optimisation, storage and interconnect scaling, and lower‑cost packaging. Generation GPUs retain a balanced design with high compute, storage, and bandwidth.

Rubin is built on a 448 Gbps SerDes interface, with upgraded connectors, cables, and PCB specifications. NVLink 5.0 surpasses the standard 106.25 Gbps Ethernet, delivering higher bandwidth for AI workloads.

As AI clusters grow, the demand for 448 Gbps interconnects intensifies. Nvidia’s private high‑speed Scale‑up protocol, NVLink, offers ecosystem‑independent optimisation, flexible launch timing, and superior system performance. The latest GTC update shows NVLink 6.0 will upgrade to a 400 Gbps SerDes channel rate, supporting advanced modulation schemes such as PAM4, SE‑MIMO, and Bi‑directional transmission.

Hardware design improvements include:

Fully cable‑less tray connections, strengthening PCB and connector ASP logic, eliminating the extensive cabling seen in GB200/GB300 systems.

The Vera Rubin platform will achieve complete cable‑free tray connectivity, with interconnect functions handled by PCB and connectors, replacing the traditional CPX mid‑board.

The upcoming Feynman platform, slated for 2028, will adopt the Kyber NVL576 rack specification.

For further technical details, readers can refer to related analyses on NVLink vs. PCIe, GPU interconnect technologies, and comprehensive Nvidia GPU parameter tables.