Fundamentals 15 min read

Why CAN Bus Dominates Automotive Networks: A Deep Dive into Its Physics and Protocol

This article explains the origins, standards, physical layer designs, differential signaling, bit timing, synchronization methods, and frame structures of the CAN bus, illustrating why it remains the most reliable and widely used fieldbus in automotive and industrial applications.

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Why CAN Bus Dominates Automotive Networks: A Deep Dive into Its Physics and Protocol

Introduction to CAN Bus

CAN (Controller Area Network) was developed by Bosch and standardized as ISO 11519 and ISO 11898, becoming one of the most widely used fieldbuses worldwide. It serves as the standard bus for automotive computer control systems and industrial embedded networks.

Physical Layer

Unlike synchronous protocols such as I2C and SPI, CAN uses asynchronous communication with two differential signal lines (CAN_High and CAN_Low) forming a differential pair.

Closed‑Loop (High‑Speed) Network

Follows ISO 11898, supports up to 40 m length at 1 Mbps, and requires a 120 Ω termination resistor at each bus end.

Open‑Loop (Low‑Speed) Network

Follows ISO 11519‑2, supports up to 1 km length at 125 kbps, uses two separate wires each terminated with a 2.2 kΩ resistor.

Communication Nodes

Each node consists of a CAN controller and a CAN transceiver. The controller sends binary data via CAN_Tx, which the transceiver converts to differential signals on the bus; reception works in reverse.

Example: an STM32 CAN peripheral paired with a TJA1050 transceiver functions similarly to a TTL‑RS‑232 level shifter.

Differential Signaling

Differential signaling uses two opposite‑phase lines, allowing the receiver to detect the voltage difference, which provides strong immunity to common‑mode noise, reduces electromagnetic emissions, and improves timing accuracy.

Bit Timing and Synchronization

CAN operates asynchronously, using a predefined baud rate and a bit‑time divided into four segments: SYNC (SS), PROP (PTS), PHASE1 (PBS1), and PHASE2 (PBS2). The total number of time quanta (Tq) per bit ranges from 8 to 25, with typical configurations such as 19 Tq per bit (1 Tq = 1 µs → 19 µs per bit, ~52.6 kbps).

Synchronization includes hard sync (triggered by a dominant start‑of‑frame edge) and resynchronization (using edge transitions within data bits). The resynchronization jump width (SJW) limits the amount of timing adjustment per sync event.

CAN Frame Types

CAN defines five frame types: Data Frame, Remote Frame, Error Frame, Overload Frame, and Interframe. The Data Frame, the most complex, consists of a dominant start bit, arbitration, control, data, CRC, ACK, and a sequence of seven recessive bits.

Control Registers

The CAN controller includes registers such as CAN_MCR (master control) and CAN_BTR (bit timing), which configure operating modes, baud rates, and synchronization parameters.

Structures for Initialization and Filtering

Typical initialization structures define parameters like prescaler, synchronization jump width, and segment lengths. Filter structures allow selective reception of messages based on identifier masks.

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embedded systemsprotocol analysisautomotive networkingCAN busdifferential signaling
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