This article explains why CPU caches are needed, describes the hierarchy and internal structure of cache lines, compares direct‑mapped, set‑associative and fully‑associative caches, and shows how cache‑aware coding can dramatically improve program execution speed.
This article explains the purpose of CPU caches, describes their hierarchical structure and internal organization—including direct‑mapped, set‑associative, and fully‑associative designs—and shows how cache‑aware programming can dramatically speed up matrix operations.
This article explains the PCIe architecture, the host's depth‑first enumeration process across buses, bridges and endpoints, demonstrates Linux lspci commands for inspecting devices, and details how PCIe memory accesses enable NVMe command submission and completion.
Baidu engineers boost C++ backend latency and cost efficiency by eliminating unnecessary string zero‑initialization, using zero‑copy split with SIMD, replacing deep protobuf merges with repeated string fields, employing job‑scoped arenas and custom memory resources for allocation, and applying prefetching, cache‑line awareness, and tuned memory‑order semantics, achieving multiplicative to order‑of‑magnitude speedups.
This article explains how a host discovers and configures PCIe devices through a depth‑first enumeration process, describes the BDF addressing scheme, and illustrates memory‑mapped I/O interactions such as NVMe command submission using Linux lspci commands.
This article explains the PCIe topology, the depth‑first enumeration algorithm used by x86 hosts to discover root complexes, switches and endpoints, shows Linux lspci commands for inspecting devices such as a Starblaze NVMe SSD, and details how PCIe memory space is used for command and data transfers.
This article explains how PCIe devices are discovered and accessed in an x86 system, detailing the hierarchical bus topology, depth‑first enumeration steps, configuration space handling, Linux lspci inspection, and NVMe command transmission through PCIe memory transactions.
