UltraRAM, a universal non‑volatile storage technology developed by Lancaster University and commercialized by Quinas Technology, promises DRAM‑like latency, thousands‑fold longer lifespan than NAND, and near‑instant data access, potentially reshaping storage markets despite current cost challenges.
This article introduces a newly released comprehensive guide on SSD flash technology while providing an in‑depth analysis of emerging Storage Class Memory (SCM) technologies—such as PCM, ReRAM, MRAM, and NRAM—detailing their principles, current research challenges, and potential system‑level innovations.
This article introduces Storage Class Memory (SCM), a non‑volatile memory technology faster than NAND but slower than DRAM, outlines its main types such as PCM, ReRAM, MRAM and NRAM, and discusses eight research topics ranging from system organization to security and software optimization.
Storage Class Memory (SCM) bridges the gap between DRAM and NAND by offering non‑volatile, near‑DRAM speed, and the article surveys major SCM types—PCM, ReRAM, MRAM, NRAM—examines their characteristics, and outlines nine research challenges ranging from system architecture to data reliability and security.
Tencent Cloud's native database team announced two breakthrough research papers—Spitfire, a three‑tier buffer manager for DRAM and NVM, and TLBtree, a read/write‑optimized tree index for non‑volatile memory—both accepted at top‑tier conferences SIGMOD and ICDE, highlighting novel memory‑aware storage techniques and collaborative achievements with leading universities.
This article explains the fundamentals, performance characteristics, and system‑software implications of emerging non‑volatile main memory technologies such as PCM, ReRAM, STT‑MRAM, and Intel Optane, and explores how they reshape the traditional storage hierarchy and drive hybrid storage designs.
This article explains the two types of SSD power loss—normal and abnormal—detailing how SSDs preserve data, the role of capacitors and non‑volatile memory, and the checkpoint‑based strategies used to quickly reconstruct mapping tables after unexpected power interruptions.
This article reviews the evolution of modern multi‑core processors and non‑volatile memory, analyzes their impact on database system architecture, discusses cache‑friendly designs, distributed logging, and benchmark results, and highlights the opportunities and challenges for DBMS developers in the era of NVRAM.
This article summarizes a 2017 Gdevops talk that examines the evolution of many‑core processors and non‑volatile memory, explains how memory‑wall effects impact modern DBMS performance, and presents architectural and algorithmic adaptations—including cache‑friendly structures, lock management, and write‑behind logging—to exploit new hardware.
