Architects' Tech Alliance

Aug 15, 2020 · Fundamentals

Intel’s 10nm Process Delays, + Naming Scheme, and the Path to Future Nodes

The article examines Intel’s delayed 10nm rollout, the confusing + naming hierarchy across its 14nm and 10nm generations, the performance trade‑offs of Cannon Lake, Ice Lake and Tiger Lake, and how the company’s shift to EUV and SuperFin aims to restore its manufacturing leadership.