The second Firmware Technology Summit in Changsha, co‑hosted by Volcano Engine and Alibaba Cloud, gathered over 200 experts to showcase cloud firmware 3.0, OpenSFI, Efistub, AI‑focused RAS, and a new IPMI‑HTTPS security model, highlighting open‑source collaboration and industry standards for next‑gen hardware‑software integration.
At the inaugural IEEE RAS in Data Center Summit (June 11‑12, California), ByteDance’s STE team presented two papers—one on AI‑guided, prediction‑based memory error prevention and another on building high‑reliability AI server head nodes—detailing challenges, solutions, and future directions for data‑center RAS.
The article explains how Vivo’s data centers use the Linux EDAC framework—combined with sysfs mapping, driver selection, and APEI error‑injection testing—to monitor per‑DIMM correctable and uncorrectable errors, enabling early fault prediction, reducing server crashes, and supporting broader RAS strategies.
The article explains how DDR and LPDDR memory systems use various error‑correcting code (ECC) schemes—including side‑band, inline, on‑die, and link ECC—to provide reliability, availability, and maintainability (RAS) protection against hard and soft memory errors in modern computing devices.
The article explains how reliability of storage, servers, and distributed systems is assessed using standards, models like MTBF/MTTR, RAS features, CAP/BASE theories, and end‑to‑end solutions, emphasizing the gap between theoretical metrics and real‑world operational data.
The article reviews the historical development from closed‑architecture mainframes to open X86‑based small servers, analyzes Huawei's Kunlun and competing products, and discusses their RAS features, partitioning technologies, and suitability for high‑availability financial database workloads.
