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Refining Core Development Skills
Refining Core Development Skills
Jan 9, 2025 · Fundamentals

Understanding Linux HugePages: Kernel Page Tables, TLB, and How to Enable and Use Them

This article explains the Linux kernel's four‑level page‑table mechanism, the performance impact of TLB misses, why using 2 MB HugePages improves address‑translation efficiency, and provides step‑by‑step instructions for reserving and allocating HugePages via boot parameters, sysfs, and mmap.

Memory ManagementPerformanceTLB
0 likes · 15 min read
Understanding Linux HugePages: Kernel Page Tables, TLB, and How to Enable and Use Them
OPPO Kernel Craftsman
OPPO Kernel Craftsman
Apr 19, 2024 · Fundamentals

Large Folios in the Linux Kernel: Benefits, Implementations, and Future Directions

Large folios in the Linux kernel combine multiple pages to reduce TLB misses, page faults, and reclamation cost while enabling more efficient compression; they are supported by filesystems like XFS and bcachefs, and recent patches add multi‑size THP, swap‑in/out handling, TAO allocation, NUMA balancing, and debug tools, with OPPO’s production deployment showing performance gains and motivating broader adoption and fragmentation mitigation.

Linux kernelMemory ManagementNUMA
0 likes · 17 min read
Large Folios in the Linux Kernel: Benefits, Implementations, and Future Directions
Selected Java Interview Questions
Selected Java Interview Questions
Aug 13, 2023 · Databases

Impact of Linux Page Size on Database Performance and Kubernetes Node Optimization

This article examines how Linux page size, especially the use of huge pages (2 MB and 1 GB), influences database throughput by reducing TLB misses, presents benchmark results, and offers practical guidance for configuring Kubernetes nodes to leverage large pages for optimal database performance.

Database PerformanceKubernetesMemory Management
0 likes · 13 min read
Impact of Linux Page Size on Database Performance and Kubernetes Node Optimization
Tencent Cloud Developer
Tencent Cloud Developer
Nov 16, 2022 · Fundamentals

Virtual Memory, Address Translation, and I/O Models in Operating Systems

Virtual memory extends limited physical RAM by giving each process a large address space translated via page tables and a TLB, while multi‑level tables manage size, and the OS separates kernel and user space, offering blocking/non‑blocking, synchronous/asynchronous, multiplexed I/O, reactor patterns, and zero‑copy techniques to optimize data transfer.

I/O multiplexingOperating SystemTLB
0 likes · 28 min read
Virtual Memory, Address Translation, and I/O Models in Operating Systems
Tencent Cloud Developer
Tencent Cloud Developer
Nov 1, 2022 · Fundamentals

Understanding CPU Cache, Memory Hierarchy, and Virtual Memory

The article explains how modern computers use fast SRAM caches (L1‑L3) inside the CPU with various mapping schemes and the MESI coherence protocol to keep data consistent, while DRAM serves as main memory, and virtual memory with multi‑level page tables and a TLB abstracts physical memory, provides isolation, and enables swapping.

CPU cacheCache CoherenceMESI protocol
0 likes · 16 min read
Understanding CPU Cache, Memory Hierarchy, and Virtual Memory