Evolution and Current Trends of NAND Flash Technology: From SLC to QLC

NAND Flash technology has progressed alongside commercial value and demand, moving from single‑level cell (SLC) to multi‑level cells (MLC, eMLC) and finally to triple‑level cell (TLC) flash, each offering higher density at lower cost.

While TLC balances performance and price better than SLC or MLC, SSD pricing remains a challenge; large‑capacity SSDs are still expensive, prompting hybrid solutions that combine smaller SSDs with larger HDDs, though pure large SSDs still deliver superior experience.

In practice, SSDs write data to new physical addresses, evenly wearing flash cells. For example, a 600 GB SSD with a 10 k write‑cycle rating can sustain up to 6 PB of writes, far exceeding typical enterprise HDD write volumes and enabling a service life of over ten years.

3D‑NAND flash has expanded to 32, 64, 72, and 96‑layer stacks, initially for consumer products but now also for enterprise storage. Major vendors—Samsung, Toshiba, Western Digital, and SK Hynix—have released TLC‑based 3D‑NAND products across these layer counts.

Toshiba, together with SanDisk, produced the world’s first 96‑layer TLC 3D‑NAND chip (256 Gb per die) slated for mass production in 2018, targeting data‑center and desktop SSD markets.

Samsung continues to lead with 64‑layer 3D NAND, while SK Hynix introduced a fourth‑generation 72‑layer 3D NAND aimed at mobile devices and now in volume production.

Intel’s SATA SSD 545s employs 64‑layer TLC flash from SK Hynix and the Silicon Motion SM2259 controller, featuring end‑to‑end data protection, ECC support, and a rated endurance of 288 TB (0.3 full‑disk writes per day).

Manufacturers often over‑provision SSD capacity (e.g., a 100 GB SSD may contain 128 GB of flash) and use advanced LDPC error‑correction algorithms to extend lifespan, as SSD durability depends on multiple factors beyond flash type.

Flash cells wear out as electrons are injected and removed, causing bit‑flips that require ECC. The industry standard BCH ECC handles most errors, but newer LDPC codes provide stronger correction for higher wear levels.

QLC flash, offering double the density of TLC, is emerging despite lower reliability and slower write speeds. Toshiba and Western Digital have demonstrated 96‑layer QLC prototypes (up to 768 Gb per die), and other vendors are expected to follow as the technology matures.

Beyond NAND, future storage classes such as Storage‑Class‑Memory (SCM) – exemplified by 3D‑XPoint from Micron and Intel, 3D‑ReRAM from Toshiba and WeTher, and hybrid 4D‑NAND combining DRAM‑like speed with NAND capacity – promise higher performance, though they are still in early adoption stages.