How CXL is Redefining Memory Architecture for the Big‑Data Era

What is CXL?

CXL (Compute Express Link) is an industry‑supported cache‑coherent interconnect that links CPUs, memory expanders, and accelerators, keeping memory spaces consistent across devices. It enables resource sharing, improves performance, simplifies software stacks, reduces system cost, and eliminates the need for redundant memory‑management hardware in accelerators.

Designed as a high‑speed open standard to support the growing use of accelerators for AI and machine‑learning workloads.

CXL 2.0 adds sector‑level data exchange, allowing more devices to connect, providing on‑demand memory capacity, and improving utilization while remaining backward compatible with CXL 1.1 and 1.0.

CXL 2.0 Enhancements

The new specification supports CXL switching, enabling multiple host processors to share distributed memory and persistent storage class memory. Hosts can directly attach external DRAM via CXL 2.0 links, with only a few nanoseconds of additional latency that system software must bridge.

Meta/Facebook Memory Pooling with CXL

Meta has been pioneering memory disaggregation through projects like Infiniswap and Transparent Page Placement (TPP). By separating DRAM from CPUs and creating pooled memory layers, Meta reduces memory cost, improves performance, and leverages CXL as the dominant standard for disaggregated memory.

TPP extends Infiniswap ideas, managing hot, warm, and cold data across different memory tiers and integrating with Meta’s Chameleon memory‑tracking tool to observe CXL memory usage in applications.

MemVerge’s Perspective on Large‑Memory Systems

MemVerge’s CEO Charles Fan argues that dynamic server composition with >10 TB memory pools will enable more workloads to run entirely in memory, reducing external storage I/O. Their software combines DRAM and Optane persistent memory into a unified pool without code changes.

MemVerge collaborates with Liqid to make DRAM/Optane pools dynamically allocatable over PCIe 3/4, and anticipates CXL 2.0 switches and external memory boxes appearing as early as 2024.

External Memory Pool Scenarios

Consider a rack of 20 servers, each with 2 TB DRAM (total 40 TB). Using MemVerge, each server’s address space can be expanded to ~3 TB, but physical DRAM slots are limited. CXL 2.0 removes this limitation by allowing a shared 30 TB external memory box to be accessed by all servers.

In a second scenario, 20 servers with 512 GB each (total 10 TB) are connected to a 30 TB CXL‑attached memory chassis, effectively providing a 40 TB pool where applications can consume up to 30.5 TB, a ten‑fold increase over the original capacity.

Implications for Applications and Future Trends

With tiered memory (hot, warm, cold) managed across DRAM, Optane, NAND, HDD, and tape, applications can prioritize data placement, reducing reliance on external storage. This shift encourages memory‑centric design, especially for databases and data‑intensive services.

Large‑scale cloud providers are expected to be early adopters, and the ecosystem of CXL switches, expanders, and storage cards is poised to grow rapidly.

Source: Zhihu aggregation and referenced technical articles.