How Data Is Stored: An Introduction to RAM, DRAM, and Memory Controllers

Because data storage is essential, scientists have long contemplated how to retain information within electronic circuits.

If a device continuously outputs a high voltage, it represents a logical 1; if it outputs a low voltage, it represents a logical 0, and the ability to switch freely between the two is required.

Enter the memory module.

2. RAM

RAM (Random Access Memory) is called random memory because data can be read from or written to any location arbitrarily.

Computers operate in binary; all data and instructions are represented as sequences of 0s and 1s.

To store a single bit, early engineers considered two circuit approaches. The first is a static solution, shown in the figure below.

This static circuit can reliably maintain a state between 0 and 1, thus called Static SRAM (Static Random Access Memory).

However, it requires many transistors per bit, making large capacities costly and physically large.

The second approach uses a single capacitor whose charge determines a 1 or 0, as illustrated.

Each storage chip contains many such bit cells; for example, a 16 GB memory module contains 137,438,953,472 bits, i.e., that many capacitors.

The drawback is that the capacitor leaks charge over time, causing the voltage to drop and making it impossible to distinguish 1 from 0.

To address this, the cells must be periodically refreshed, a process known as dynamic refresh, giving rise to Dynamic RAM (DRAM).

3. Memory Controller

When data needs to be read, the specific bit is identified by chip number, bank, row address, and column address.

These internal details are cumbersome, so a memory controller abstracts them, providing a simple interface.

The memory controller acts as an intermediary between the CPU and the memory modules.

Because capacitors leak, the controller must refresh each cell at least every 64 ms.

Data is stored across many chips and banks; accessing a particular bit requires specifying the chip, bank, row, and column.

The CPU prefers not to handle such complexity, so the memory controller translates a single address into the appropriate location, performs the read or write, and returns the data.

Modern CPUs integrate the memory controller, and as CPU speeds increased, caches were added to store frequently accessed data, reducing the need to fetch from main memory each time.