The article explains how John von Neumann’s 1945 decision to store programs in memory created the universal von Neumann architecture, why this simple design outlasted more optimal alternatives, and how his ideas also spawned parallel computing and game theory, shaping modern computers, AI, and distributed systems.
In an age where AI can generate code, mastering C remains essential because it reveals the low‑level mechanisms of memory, pointers, and CPU behavior that high‑level languages hide, enabling developers to write high‑performance software and stay valuable in the job market.
This article explains the fundamentals of data storage in computers, covering the concepts of RAM, the differences between static SRAM and dynamic DRAM, and how memory controllers manage refresh cycles and address translation to enable efficient read/write operations.
This article explains how memory hierarchy and cache design, guided by the principle of locality, reduce the CPU‑memory speed gap, and provides practical guidelines for writing cache‑friendly code to dramatically improve program performance.
This comprehensive guide explores 100 essential CPU concepts, covering core parameters, memory and bus specifications, architectural technologies, major vendors, application scenarios, and performance evaluation methods, providing a complete reference for hardware enthusiasts and professionals alike.
This article explains the key performance evaluation metrics for computer systems, illustrates them with real‑world benchmark results from the Phoronix Test Suite, and provides a comprehensive overview of the SPEC CPU benchmark suites (2000, 2006, 2017) and how their scores are calculated.
This comprehensive guide covers 100 essential GPU fundamentals, from basic definitions and architecture to core technologies, performance optimization, emerging trends, and industry developments, providing a complete technical foundation for graphics, AI, and high‑performance computing applications.
This article explains why cache is critical for computer performance and provides a thorough analysis of the three classic cache mapping strategies—direct‑mapped, fully associative, and set‑associative—detailing their mechanisms, advantages, disadvantages, concrete examples, and guidance on selecting the appropriate method for different system scenarios.
This comprehensive guide covers GPU definitions, evolution, core components, architectural designs, performance metrics, programming models, deep‑learning applications, comparisons with other processors, practical use cases, optimization techniques, and future trends, providing a solid foundation for anyone interested in modern graphics and compute acceleration.
This article walks you through the basic principles of how computers operate, illustrating how simple logic gates can be combined to create binary arithmetic, memory storage, and control logic, ultimately forming a CPU that can execute instructions and perform calculations automatically.
This article traces Intel's processor lineage from the 1971 4004 to modern x86_64 CPUs, explains why the 32‑bit operating system is called x86 despite varying bit widths, and clarifies the naming conventions used by AMD and Microsoft for 64‑bit platforms.
This article explains the principles of CPU cache, the multi‑level memory hierarchy, virtual memory, data consistency, and concurrency control mechanisms, illustrating how they together bridge the speed gap between the fast processor and slower memory/storage in modern computer systems.
CPU cache, a multi‑level SRAM memory positioned between registers and main memory, evolved from non‑existent in early CPUs to sophisticated L1‑L4 hierarchies, addressing the massive speed disparity between processors and RAM by exploiting spatial and temporal locality to dramatically boost overall system performance.
The article explains how CPU computation latency arises from memory speed, bandwidth, and access delays, detailing the relationships among memory, bandwidth, and latency, and examines key factors such as clock frequency, pipelining, parallelism, cache hit rate, and signal propagation distances that together determine overall system performance.
This article traces the GPU's journey from early 2D graphics cards to modern GPGPUs powering AI and HPC, explains core hardware components, compares GPU and CPU architectures, and details the 3D rendering pipeline that underlies graphics and parallel computation.
The article explains how assembly language serves as the foundational layer beneath all high‑level languages, illustrating its essential role in translating code to machine instructions, and argues that understanding assembly deepens comprehension of computer architecture despite its rare direct use today.
The article explains how the primitive binary switches of early CPUs evolved through machine code and assembly into high‑level languages, using recursion, syntax trees and compiler concepts to bridge human abstraction with the CPU's concrete operations.
This article compares the major instruction set architectures—x86, ARM, and RISC‑V—explaining their CISC versus RISC philosophies, historical evolution, technical trade‑offs, and the current market landscape of domestic and global CPU vendors.
This article explains the fundamentals of CPUs, covering their definition, core functions, internal structure, registers, instruction cycles, assembly language, branching, and how they interact with memory and I/O devices to execute programs.
John von Neumann’s pioneering work—from the stored‑program computer architecture and the famous fly‑between‑trains paradox to his foundational contributions in game theory, quantum mechanics, and self‑replicating automata—illustrates how his mathematical brilliance drove breakthroughs that still underpin today’s computing, economics, and artificial life research.
This article explains the role of the CPU, its internal structure, key components like the control unit and ALU, registers, program counter, and how instructions are fetched, decoded, executed, and written back, using clear diagrams and examples.
This article explains the evolution of DRAM from early SDRAM to DDR5, detailing DDR’s double‑edge data transfer, architectural changes, performance gains over DDR4, key technical features, and essential terminology for understanding modern high‑bandwidth memory systems.
Renowned computer architect Gordon Bell, whose pioneering work on DEC’s PDP series, the creation of Bell’s Law, and leadership in supercomputing and high‑performance computing institutions, left an enduring legacy that continues to influence modern systems, AI, and the evolution of computing technology.
By following Ben Eater’s step‑by‑step tutorial, a non‑computer‑science student assembled a fully functional 8‑bit CPU on a breadboard using a 555‑timer clock and TTL chips such as 74LS173 and 74LS245, spending two months on half‑hour daily sessions to achieve a working processor that deepened their grasp of computer architecture and basic electronics.
This article explains the fundamentals of data storage in computers, covering the concepts of RAM and DRAM, the role of capacitors and transistors, and how memory controllers and CPU caches work together to manage and accelerate access to binary information.
This article explains the fundamentals of a CPU, covering its definition, core functions, internal structure, registers, instruction cycle, assembly language basics, program counter, branching, flag registers, function calls, and how memory addressing enables array-like operations.
The article describes how the author followed Ben Eater’s step‑by‑step tutorial to hand‑assemble a functional 8‑bit CPU on a breadboard, detailing required components, sourcing parts in China, wiring procedures, and practical tips for beginners interested in computer architecture and electronics DIY.
This article explains why ECC memory modules use an extra chip, how bit‑flip errors occur in 64‑bit CPU‑memory transfers, and how simple parity and Hamming‑code algorithms detect and correct single‑bit errors while only detecting double‑bit errors, illustrating the principles with diagrams and examples.
This article provides a comprehensive overview of contemporary processor instruction set architectures, comparing CISC‑based x86 with RISC‑based ARM and RISC‑V, discussing their design philosophies, historical evolution, advantages, disadvantages, and the current landscape of domestic and international CPU development.
This article explains what a CPU is, how it processes instructions through fetch‑decode‑execute stages, its internal components such as the control unit, ALU and various registers, the role of memory and program counters, and introduces assembly language concepts and branching mechanisms.
This article demystifies the CPU by defining its role as the computer's brain, describing the fetch‑decode‑execute cycle, detailing its internal components such as the control unit, ALU and various registers, and explaining how instruction sets, assembly language, program counters, flags, function calls, and array addressing work together to run programs.
This article provides a comprehensive, step‑by‑step overview of CPU fundamentals, covering its definition, core functions, internal architecture, key registers, instruction execution stages, program counter behavior, conditional branching, flag registers, function calls, memory addressing, and the classic fetch‑decode‑execute pipeline.
This article explains why CPU caches are needed, describes the hierarchy and internal structure of cache lines, compares direct‑mapped, set‑associative and fully‑associative caches, and shows how cache‑aware coding can dramatically improve program execution speed.
The article provides a comprehensive overview of CPU architecture, covering the distinction between x86 and non‑x86 processors, packaging types, internal components such as the IHS, TIM, die and interposer, the execution pipeline of a Core i7, cache hierarchy, performance metrics, and common cache replacement algorithms.
This article explains the fundamental principles of computer operation, covering the von Neumann model, CPU and RAM interaction, instruction sets, memory hierarchy, caches, endianness, compilers, operating systems, and performance optimizations, while illustrating each concept with diagrams and code examples.
This article explains the fundamental principles of how computers operate, covering the basic architecture of CPUs and memory, the role of buses and registers, instruction sets, compiler translation, cache hierarchies, storage layers, and the impact of 32‑bit versus 64‑bit designs.
The article reflects on how programming has become increasingly abstract, causing developers to overlook the CPU, memory, and low‑level architecture, and argues that revisiting these fundamentals is essential for deeper technical competence in today's software industry.
The article reflects on why modern programmers seldom think about the CPU, tracing the historical shift from assembly to high‑level languages, and argues that understanding low‑level architecture, registers, and memory remains essential despite the growing abstraction layers in software development.
The author reflects on the enduring value of deep computer fundamentals, emphasizing that solid foundational knowledge—spanning binary arithmetic, memory organization, CPU architecture, and low‑level programming—remains the most rewarding investment for developers seeking to avoid code degradation and excel in their careers.
This article explains what a GPU is, compares its architecture to CPUs, explores its strengths in graphics rendering and AI inference, and outlines key specifications such as cores, cache, and memory, providing a clear overview for anyone curious about modern graphics processors.
The article explains the fundamentals of data storage in computers, describing how binary data is saved using memory modules, the differences between static SRAM and dynamic DRAM, and the role of memory controllers in translating addresses and managing refresh cycles.
Frederick P. Brooks Jr., pioneering computer architect, Turing Award laureate, and author of seminal works like The Mythical Man‑Month and No Silver Bullet, left a lasting legacy that continues to influence software engineering, computer architecture, and computer science education.
This article provides a comprehensive overview of how computers operate, covering CPU instruction cycles, memory organization, endianness, compiler translation, operating‑system interaction, cache levels, storage tiers, and the principles of temporal and spatial locality that drive modern performance optimizations.
This article explains the memory hierarchy—from registers to disks—covers cache fundamentals, the principle of locality, cache organization (including direct‑mapped caches), and provides guidelines and example code for writing cache‑friendly programs to improve performance.
The article explains how data is stored in computers, describing the principles of RAM and DRAM, the differences between static and dynamic memory cells, and the role of memory controllers in translating CPU addresses to physical memory locations while handling refresh cycles.
This article outlines eight enduring ideas—from designing for Moore's Law and using abstraction to speeding up common cases, leveraging parallelism, pipelining, prediction, memory hierarchy, and redundancy—that have shaped computer architecture over the past six decades.
This article explains the basic principles of computer architecture, covering CPU operation, memory hierarchy, cache levels, instruction sets, compilation, endianness, and related concepts such as simulators and operating system interactions, illustrating how simple instructions enable complex computations.
This article explores what truly lasting knowledge is by examining abstract models, philosophical approaches like agnosticism and universal doubt, and fundamental computer concepts such as the Von Neumann architecture, compilation theory, and distributed systems, urging learners to focus on underlying models rather than transient facts.
The HiPChips workshop at ISCA 2022 gathered leading academia and industry experts to discuss the motivations, recent research breakthroughs, technical challenges, and ecosystem efforts surrounding high‑performance chiplet and interconnect architectures for future computing systems.
This article provides a comprehensive overview of RISC‑V, covering its open‑source ISA philosophy, historical development, RISC versus CISC design trade‑offs, modular extensions, basic integer instruction set, register file, common extensions such as M, F, D, C, and examples of commercial implementations, illustrating why RISC‑V has become a leading architecture for modern processors.
This article explores the core principles of computer operation, covering CPU architecture, memory hierarchy, instruction execution, compiler role, cache levels, and the impact of hardware design on performance, while illustrating concepts with diagrams and practical examples to demystify how modern computers process data.
Li Sanli, a distinguished computer science professor at Tsinghua University and academician of the Chinese Academy of Engineering, passed away at 87, leaving a legacy that includes pioneering work on China’s first VLSI, RISC, and high‑performance supercomputers such as DeepSuper‑21C and Ziyou‑3000.
This tutorial walks you through creating a small LC‑3 virtual machine in C, covering the underlying architecture, memory and register modeling, instruction decoding, implementation of key opcodes such as ADD and LDI, trap routines, program loading, and platform‑specific details, all with full source code examples.
The article examines a puzzling StackOverflow case where sorting a random array before summation yields a six‑fold speedup, explains the phenomenon through CPU five‑stage pipeline fundamentals, structural, data, and control hazards, and shows how branch prediction and operand forwarding mitigate the performance loss.
John von Neumann, a 20th‑century polymath, revolutionized computing with the von Neumann architecture, contributed to the Manhattan Project, pioneered game theory, advanced quantum mechanics, and foresaw climate change, leaving a legacy that still underpins today’s technology and strategic thinking.
This article explores the role of cache in computer architecture, covering why caches are needed, how data is placed and retrieved, various replacement policies, write strategies, and consistency protocols such as MESI, while illustrating concepts with diagrams and code examples.
This article explains the motivation behind CPU caches, describes their placement in the memory hierarchy, details cache organization, placement policies, lookup mechanisms, replacement strategies, write handling, and coherence protocols such as MESI, providing a comprehensive overview of cache fundamentals.
This article explains the fundamental principles of computer operation, covering CPU architecture, memory organization, instruction execution, compiler translation, caching strategies, and the role of operating systems, while illustrating concepts with diagrams and code examples.
The article analyzes how GPU architecture, originally designed for 3D graphics, is being reshaped by AI demands through specific‑domain designs, hardware/software interfaces, tensor acceleration, and 3D/AI convergence, ultimately arguing that GPUs will remain the central compute platform in the new golden age of computer architecture.
This article explains the basic principles of computer architecture, covering CPU operation, memory organization, binary representation, instruction sets, caching levels, storage hierarchy, compilers, script languages, and the impact of open‑source software on system design.
This article explains how computer systems combine hardware and system software, describes the memory hierarchy, operating‑system abstractions, Amdahl's law, and various forms of parallelism, and shows why mastering these fundamentals can dramatically improve program efficiency and reliability.
This article provides a comprehensive overview of cache memory, explaining why caches are needed, their placement strategies, operation principles, replacement policies, write handling methods, and coherence protocols such as MESI, offering essential knowledge for computer architecture and system design.
The article explains high‑performance computing (HPC) concepts, including serial and parallel processing, supercomputer performance measured in FLOPS, real‑world scientific applications such as drug discovery and weather forecasting, and the hardware architectures that enable these massive computational capabilities.
The article explains the fundamental role of CPUs in modern computing, reviews their historical development, analyzes the current market dominated by foreign giants, highlights policy‑driven growth of domestic processors, and outlines how emerging fields like 5G, cloud, AI and IoT create new demand and opportunities for CPU innovation.
This article explains the purpose of CPU caches, their classification, placement and replacement strategies, write policies, and coherence protocols, providing a comprehensive overview of cache concepts essential for modern computer architecture.
The 1994 Intel Pentium FDIV floating‑point bug, caused by a handful of zero entries in a 2048‑entry lookup table, remained hidden for years until a mathematician spotted anomalies, prompting a worldwide collaborative effort that ultimately produced a clever scaling fix and massive media attention.
This article explains why computers use binary and two's complement to represent signed numbers, tracing the evolution from counting on fingers to decimal, Roman numerals, original code, one's complement, and finally two's complement, and shows how these choices simplify hardware design.
This article explains how a single transistor acts as a switch, how combining AND, OR, and NOT gates yields logical completeness, how binary addition is built from these gates, and how registers, memory, instruction sets, and clock signals together form a functional CPU.
The article explains the purpose and structure of the memory hierarchy—from ultra‑fast registers and caches inside the CPU, through volatile main memory, to slower non‑volatile disks—showing how programs are loaded, executed, and how virtual memory and locality principles extend usable memory beyond physical limits.
This article explains how computer systems combine hardware and system software, describes the memory hierarchy, OS abstractions, Amdahl's law, and the three levels of parallelism—thread‑level, instruction‑level, and SIMD—showing why understanding these concepts is essential for writing fast, reliable programs.
This article explains the purpose of I/O buses, describes common external interfaces like USB, outlines internal bus types such as chip, system, data, address, and control buses, and details various bus arbitration methods with their advantages and drawbacks.
This article traces the historical evolution of computers from first‑generation vacuum‑tube machines to modern VLSI systems, explains fundamental performance limits such as the von Neumann bottleneck and power consumption, and introduces parallel optimization concepts like Amdahl’s Law and future computing paradigms.
Despite nearing retirement, 90‑year‑old Boris Babayan, the USSR’s first computer science student and chief architect of the Elbrus supercomputers, continues to influence modern processor design, from pioneering VLIW architectures to his pivotal role at Intel, while also excelling as a mountaineering champion.
This article explains the role of CPU cache in modern processors, covering its purpose, the memory hierarchy, the differences between L1, L2, and L3 caches, how cache hits and misses affect latency, and future trends such as larger and on‑chip caches.
This article explains what CPU cache is, why it matters for processor performance, how it works within the memory hierarchy, the differences among L1, L2, and L3 caches, the impact of cache hits and misses on latency, and emerging trends in cache design.
This article provides a concise, visual explanation of the fundamental differences between cache and buffer, illustrating their distinct roles—cache for speeding data retrieval and buffer for smoothing data flow—through real‑world analogies, hardware examples, and practical usage scenarios.
This comprehensive guide explores the myriad x86/x64 CPU registers—including general, flag, instruction, segment, control, debug, descriptor, task, and model‑specific registers—explaining their roles, how they interact in memory addressing, multitasking, system calls, and debugging, while highlighting key differences between 32‑bit and 64‑bit modes.
This article explains the fundamental hardware components of a CPU, starting with early relay‑based machines, describing basic logic gates, constructing simple adders and an ALU, detailing memory and registers, and illustrating the fetch‑decode‑execute cycle and the evolution of machine code to assembly language.
This article explains how basic electrical phenomena, relays, and binary arithmetic combine to form logic gates, adders, flip‑flops, counters, RAM, and ultimately a rudimentary 8‑bit computer, illustrating each step with clear diagrams and practical examples.
This answer explains why ordinary programmers should study core computer science subjects—data structures and algorithms, operating systems, compiler theory, and computer organization—illustrating each with practical examples, typical use cases, and the benefits they bring to real‑world software development.
This comprehensive guide explains over 190 fundamental operating system and computer architecture concepts—including OS kernels, memory management, process control, virtualization, storage, networking, and security—providing clear definitions, examples, and visual illustrations to help readers grasp the core building blocks of modern computing systems.
This article explains the core components and operation of a CPU, covering the fetch‑decode‑execute cycle, instruction sets, registers, pipeline and superscalar designs, multi‑core and hyper‑threading concepts, and the hierarchy of caches from registers to L3, providing a comprehensive fundamentals overview.
This article explains the purpose and usage of key ARMv8-A registers—including general‑purpose, stack‑pointer, SIMD/floating‑point, program status, link, and program counter registers—while detailing their encoding, access modes, and relevance to exception levels.
This article provides a detailed glossary of over 80 fundamental operating system concepts, covering everything from basic definitions of OS, kernel and user modes to hardware components, memory hierarchies, file systems, process management, and virtualization, illustrated with diagrams and reference links.
This article provides a comprehensive overview of operating system fundamentals and computer architecture, covering topics such as OS components, kernel and user modes, memory management, process handling, hardware interfaces, storage hierarchies, virtualization, and related historical and modern systems in roughly eighty concise entries.
The article explains the rapid evolution of the PCIe bus standard—from the widely used PCIe 3.0 through PCIe 4.0 and 5.0 up to the upcoming PCIe 6.0—detailing version milestones, bandwidth improvements, signaling changes, backward compatibility, and its impact on hardware and AI workloads.
This article chronicles the development, challenges, and ultimate decline of IBM’s OS/2 operating system, detailing its partnership with Microsoft, hardware and software hurdles, market competition, and the lessons modern tech companies can draw from its ambitious yet ill-fated journey.
This article provides a comprehensive overview of operating system fundamentals, covering hardware components, kernel and user modes, CPU architecture, memory hierarchy, caching strategies, I/O devices, bus systems, boot processes, and various types of operating systems from mainframes to embedded devices.
A comprehensive guide that walks you through the inner workings of a computer—from the CPU’s fetch‑decode‑execute cycle and register set, through memory hierarchy and binary arithmetic, to function calls, assembly language, and essential operating‑system concepts like APIs, multitasking and virtual memory.
This article explains the historical shift from early north‑bridge memory buses to integrated CPU memory controllers, details the progression of SDRAM to DDR4—including voltage, prefetch and feature changes—covers future trends in capacity, voltage and frequency, and compares system memory bandwidth with GPU memory technologies such as GDDR5 and HBM.
This article explains how a CPU executes programs through the fetch‑decode‑execute cycle, describes instruction sets, registers, pipelines, superscalar and multithreaded designs, and details the hierarchy of caches from registers up to L3, providing a comprehensive overview of modern processor fundamentals.
This article explains how basic semiconductor concepts and diode‑based logic gates can be combined into simple arithmetic circuits, registers, and a minimal instruction set to construct a functional 4‑bit CPU, illustrating each step with diagrams and historical context.
The article explains the structural differences between CPUs and GPUs, their respective design goals, and why GPUs excel at parallel image and AI workloads, while also noting a New Year promotional bundle of technical e‑books priced at 168 yuan.
This article explains the history, architecture, and operation of GPUs, and introduces major acceleration frameworks such as CUDA and OpenCL, highlighting their roles in parallel computing and modern graphics processing for scientific and AI workloads.
The article explains the latest TOP500 supercomputer rankings, emphasizes that architecture—not just CPU count—is the core technology behind high‑performance computing, describes the challenges of networking, software, and power, and illustrates diverse applications such as nuclear simulation, climate forecasting, and video rendering.
This article walks through every step from pressing a key on the keyboard to the browser rendering a web page, covering hardware signaling, kernel interrupt handling, DNS resolution, TCP handshakes, HTTP exchange, and final page display, illustrating how many university‑level concepts intersect in a single URL request.
This article introduces the fundamentals of virtualization and cloud computing, explains their relationship, describes computer hardware components, shows how operating systems abstract resources, outlines hardware checks for virtualization support, and previews software solutions, providing a clear, beginner-friendly overview of how virtual machines are created and managed.
This article provides a detailed chronological overview of the rivalry between Intel and AMD, covering their shared origins, early collaborations with IBM, legal battles, the rise of AMD’s Athlon and 64-bit processors, Intel’s Tick‑Tock strategy, and the evolving market dynamics that shaped modern CPU architecture.
This article provides a comprehensive visual overview of CPU architecture, instruction sets, operating system purposes, programming layers, privilege rings, execution modes, user interfaces, and the distinction between ABI and API, helping readers grasp core computing concepts in a structured manner.
Through a whimsical first‑person narrative, the article walks readers through a CPU’s start‑up sequence, BIOS interrupt handling, loading the boot sector, memory access patterns, the principle of locality, cache usage, and the introduction of pipelining to illustrate fundamental computer architecture concepts.
