NVLink High‑Speed Interconnect: Architecture, Evolution, and Performance

NVLink is NVIDIA's high‑speed interconnect architecture designed to overcome the bandwidth limitations of traditional PCIe links. First appearing in the P100 GPU, it enables much higher bandwidth and lower latency for data transfer between GPUs and between GPUs and CPUs, benefiting data‑intensive applications such as deep learning, scientific computing, and large‑scale simulations.

The first‑generation NVLink uses a clever design of duplex dual‑lane channels, combining 32 wires into eight pairs to achieve 40 GB/s bidirectional bandwidth per link, resulting in a total of 160 GB/s for the P100 chip. This architecture also supports atomic peer‑to‑peer operations and can be bundled to increase bandwidth further.

Implementation details show that the P100 achieves about 94 % bandwidth efficiency, and NVLink supports both GPU‑GPU and GPU‑CPU communication, including direct connections to IBM POWER CPUs, eliminating the PCIe bottleneck.

NVLink topology varies with system design; early DGX‑1 systems used a graph‑like mesh, while IBM Power8+ platforms enable direct GPU‑CPU links. Multi‑GPU nodes often employ a fully connected mesh to maximize data exchange efficiency.

The fifth generation of NVLink, introduced with the 2024 Blackwell architecture, doubles per‑GPU bandwidth to 1800 GB/s by increasing the signaling rate of each link while keeping the number of links per GPU constant at 18. This continues the trend of doubling link speeds each generation.

In summary, NVLink provides a crucial solution to the growing bandwidth demands of modern AI models and HPC workloads, offering superior performance, flexible topologies, and continuous evolution across NVIDIA's GPU generations.