Understanding x86 Linux Fundamentals: From Intel 8086 to CPU Addressing

What is “Linux from Scratch”?

The author, after extensive work on x86 Linux, noticed many fundamental concepts (e.g., segment descriptors) had been forgotten. Modern Linux kernel sources exceed 100 MiB (e.g., version 5.13), making a systematic study of low‑level architecture desirable.

Define the ultimate goal: learn the Linux operating system. Focus on underlying principles rather than raw assembly code. Combine related sections from multiple classic books instead of following any single book’s order. Compare selected topics with Linux 2.6 source to see how they map to real kernel code. Maintain consistency and personal motivation throughout the series.

Intel 8086 Processor

The Intel 8086, introduced in 1978, is the first 16‑bit processor and the ancestor of the IA‑32 architecture. Although it has a 20‑bit address bus (allowing up to 1 MiB of addressable memory), its internal data path, registers, and arithmetic unit are 16 bits wide.

The arithmetic unit processes at most 16 bits at a time.

General‑purpose registers are 16 bits wide.

The data path between registers and the arithmetic unit is 16 bits.

Main Memory

Main memory (RAM) is byte‑addressable storage directly connected to the CPU. A 64 KiB segment has addresses ranging from 0x0000 to 0xFFFF, giving a total capacity of 65 536 bytes (64 KB).

Atomic operations in the Linux kernel (e.g., mutex implementations) rely on this byte‑addressable model, and compilers often use -fPIC to generate position‑independent code that can be relocated at runtime.

Registers

Registers are small, fast storage elements inside the CPU. In the 8086 they are 16 bits wide and can be accessed as two 8‑bit halves (high and low bytes). The primary general‑purpose registers are AX, BX, CX, and DX, each split into AH/AL, BH/BL, etc.

mov AX, 0x005D  ; load 0x005D into AX (16‑bit)
mov AL, 0x5D    ; load 0x5D into AL (8‑bit)

Buses

The CPU communicates with memory and peripherals via three distinct buses:

Address bus – carries the address of the memory location.

Control bus – carries control signals from the CPU.

Data bus – carries the actual data being read or written.

The 8086 has a 20‑bit address bus (1 MiB addressing) and a 16‑bit data bus (transferring 16 bits per operation).

CPU Memory Addressing

In Linux 2.6 the compiler generates virtual (logical) addresses. These are first transformed into linear addresses via segment translation, then into physical addresses via paging.

Physical address = segment × 16 + offset

For the 8086, a 20‑bit physical address is formed by combining a 16‑bit segment value (shifted left 4 bits) with a 16‑bit offset.

Controlling the CPU

The CPU fetches an instruction from the memory location pointed to by the CS:IP registers and executes it. Changing the contents of these registers (or other general‑purpose registers) changes which instruction the CPU runs. In embedded systems, configuring peripheral registers achieves similar control.

CPU Instruction Execution Flow

Executing a single instruction involves the following steps (illustrated with a typical three‑byte instruction):

Combine CS and IP in the address adder to obtain a 20‑bit physical address.

Place the address on the address bus.

Read the instruction bytes from memory onto the data bus and store them in the instruction buffer.

Increment IP by the instruction length (e.g., 3 bytes for B8).

Decode and execute the buffered instruction (e.g., load 0x0123 into AX).

Modern CPUs perform many more micro‑operations, but this outlines the fundamental fetch‑decode‑execute cycle.