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CPU

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IT Services Circle
IT Services Circle
Jun 9, 2025 · Fundamentals

How Logic Gates Build a Computer: From Binary to CPU Explained

This article walks you through the basic principles of how computers operate, illustrating how simple logic gates can be combined to create binary arithmetic, memory storage, and control logic, ultimately forming a CPU that can execute instructions and perform calculations automatically.

CPUComputer Architecturebinary arithmetic
0 likes · 8 min read
How Logic Gates Build a Computer: From Binary to CPU Explained
Architects' Tech Alliance
Architects' Tech Alliance
May 26, 2025 · Artificial Intelligence

NVLink Fusion: NVIDIA’s High‑Bandwidth Interconnect for Heterogeneous AI Computing

NVLink Fusion, unveiled at Computex 2025, extends NVIDIA’s NVLink technology to enable high‑bandwidth, low‑latency connections between CPUs and GPUs or third‑party accelerators, offering up to 900 GB/s bandwidth, flexible heterogeneous configurations, ecosystem expansion, performance gains for AI training and inference, and potential cost reductions.

AICPUGPU
0 likes · 12 min read
NVLink Fusion: NVIDIA’s High‑Bandwidth Interconnect for Heterogeneous AI Computing
Deepin Linux
Deepin Linux
May 8, 2025 · Fundamentals

Comprehensive Guide to CPU Performance Optimization and Tools

This article provides an in‑depth overview of CPU performance metrics, practical optimization techniques—including algorithm selection, compiler flags, cache‑aware programming, and vectorization—along with real‑world case studies and a detailed survey of Linux profiling and analysis tools for developers.

CPUCompilerlinux
0 likes · 31 min read
Comprehensive Guide to CPU Performance Optimization and Tools
Deepin Linux
Deepin Linux
May 2, 2025 · Fundamentals

Understanding CPU Cache, Memory Hierarchy, and Concurrency Control

This article explains the principles of CPU cache, the multi‑level memory hierarchy, virtual memory, data consistency, and concurrency control mechanisms, illustrating how they together bridge the speed gap between the fast processor and slower memory/storage in modern computer systems.

CPUCacheComputer Architecture
0 likes · 21 min read
Understanding CPU Cache, Memory Hierarchy, and Concurrency Control
Java Tech Enthusiast
Java Tech Enthusiast
Apr 19, 2025 · Fundamentals

Understanding CPU Usage Spikes: Pipeline, Locks, and Optimization

The article explains how CPU pipelines, cache misses, branch‑prediction failures and lock contention cause non‑linear usage spikes, illustrates common pitfalls such as infinite loops, lock‑heavy spinning and catastrophic regex backtracking, and offers practical detection with perf and three rules—avoid busy‑waiting, use cache‑friendly layouts, and limit thread contention.

CPUconcurrencylow-level
0 likes · 6 min read
Understanding CPU Usage Spikes: Pipeline, Locks, and Optimization
IT Services Circle
IT Services Circle
Mar 30, 2025 · Fundamentals

From Polling to Interrupts: Understanding Early Operating System Mechanisms

The article explains how early batch-processing systems relied on inefficient polling of slow I/O devices, describes the inspiration from IBM 704's overflow flag, and details the invention and implementation of hardware and software interrupts, including interrupt types, vector tables, and handler functions, to enable efficient CPU‑device interaction.

CPUException HandlingHardware
0 likes · 7 min read
From Polling to Interrupts: Understanding Early Operating System Mechanisms
Architects' Tech Alliance
Architects' Tech Alliance
Mar 11, 2025 · Fundamentals

Fundamentals of AI Chips: General Processor (CPU) – ALU, Registers, and Controller

This article introduces the basic structure of a general‑purpose CPU used in AI chips, describing the arithmetic‑logic unit (ALU), the different types of registers, and the controller, while also directing readers to extensive AI‑chip technical report collections for deeper study.

AI chipALUCPU
0 likes · 3 min read
Fundamentals of AI Chips: General Processor (CPU) – ALU, Registers, and Controller
Aikesheng Open Source Community
Aikesheng Open Source Community
Feb 25, 2025 · Databases

Understanding CPU Allocation Logic in OceanBase 4.x and How to Modify the cpu_count Configuration

This article explains the background of tenant creation failures caused by insufficient CPU resources in OceanBase, details the calculation of usable CPU in version 4.x, shows how to query CPU usage with SQL, describes related configuration parameters, and provides step‑by‑step procedures for modifying cpu_count and testing over‑commit scenarios across different OceanBase versions.

CPUConfigurationOceanBase
0 likes · 12 min read
Understanding CPU Allocation Logic in OceanBase 4.x and How to Modify the cpu_count Configuration
System Architect Go
System Architect Go
Dec 11, 2024 · Cloud Native

Kubernetes CPU Configuration and Linux CFS Interaction

This article explains how Kubernetes resource requests and limits map to Linux cgroup settings via the CFS scheduler, illustrates the underlying calculations for cpu.shares and cpu.cfs_quota_us, and discusses the impact on programming languages such as Go and Java within containers.

CFSCPUGo
0 likes · 5 min read
Kubernetes CPU Configuration and Linux CFS Interaction
DevOps Operations Practice
DevOps Operations Practice
Dec 8, 2024 · Information Security

Incident Report: Investigating and Removing a Server Malware Causing 100% CPU Usage

This article documents a step‑by‑step investigation of a compromised Linux server that exhibited 100% CPU usage, detailing process, network, and startup‑service analysis, the discovery of a cryptomining malware, and the complete removal procedure.

CPUServerincident response
0 likes · 5 min read
Incident Report: Investigating and Removing a Server Malware Causing 100% CPU Usage
Efficient Ops
Efficient Ops
Dec 8, 2024 · Operations

Diagnosing High Load with Low CPU on Linux: Commands and Tips

This guide explains how to analyze and troubleshoot situations where a Linux system shows high load averages despite low CPU usage, covering common load analysis methods, key commands like top, vmstat, iostat, and practical solutions for I/O bottlenecks and stuck processes.

CPULoadlinux
0 likes · 11 min read
Diagnosing High Load with Low CPU on Linux: Commands and Tips
Architects' Tech Alliance
Architects' Tech Alliance
Nov 21, 2024 · Fundamentals

El Capitan Supercomputer and the Rise of AMD GPU‑Driven HPC: Architecture, Performance, and Market Impact

The article examines the El Capitan supercomputer unveiled at SC24, detailing its AMD CPU‑GPU hybrid architecture, benchmark results, its dominance in the November 2024 Top500 list, and the broader implications for high‑performance computing, AI workloads, and the competitive landscape between AMD and NVIDIA.

AIAMDCPU
0 likes · 20 min read
El Capitan Supercomputer and the Rise of AMD GPU‑Driven HPC: Architecture, Performance, and Market Impact
Java Tech Enthusiast
Java Tech Enthusiast
Sep 1, 2024 · Fundamentals

Introduction to x86 Assembly Language: Registers, Memory Model, and Stack Operations

This article introduces x86 assembly language, explaining its historical origins, the role of CPU registers such as EAX and ESP, the heap and downward‑growing stack memory models, and demonstrates basic stack‑frame operations like push, call, mov, add, pop, and ret through a simple compiled example.

CPULow-level programmingStack
0 likes · 13 min read
Introduction to x86 Assembly Language: Registers, Memory Model, and Stack Operations
Tencent Cloud Developer
Tencent Cloud Developer
Aug 1, 2024 · Backend Development

Linux Performance Analysis Tools and Troubleshooting Methods for Backend Development

The article presents a concise mind‑map of essential Linux performance tools and a flexible troubleshooting workflow, guiding backend developers through CPU, memory, disk, and network issues by using utilities such as top, oprofile, slabtop, iotop, netstat, and strace to quickly pinpoint and resolve bottlenecks.

Backend DevelopmentCPUDisk I/O
0 likes · 11 min read
Linux Performance Analysis Tools and Troubleshooting Methods for Backend Development
Java Tech Enthusiast
Java Tech Enthusiast
Jul 26, 2024 · Fundamentals

From Binary to High-Level Languages: The Origin of Compilers and Recursion

From raw binary on punched tape to mnemonic assembly and then to high‑level constructs like if, while, and functions, programmers created recursive grammars that compile source code into abstract syntax trees, which a compiler translates back into machine instructions, illustrating how recursion underpins both programming language design and computation.

CPUCompilerassembly
0 likes · 11 min read
From Binary to High-Level Languages: The Origin of Compilers and Recursion
Architects' Tech Alliance
Architects' Tech Alliance
Jun 29, 2024 · Fundamentals

2024 China Server CPU Industry Overview: Market Size, Competition, and Ecosystem Trends

The 2024 China server CPU industry overview analyzes the dominance of X86 and ARM ecosystems, presents market size growth from 2018 to 2028, examines competitive advantages of domestic vendors, and discusses policy-driven demand and pricing challenges shaping the domestic CPU market.

ARMCPUChina
0 likes · 6 min read
2024 China Server CPU Industry Overview: Market Size, Competition, and Ecosystem Trends
Architect's Guide
Architect's Guide
Jun 16, 2024 · Operations

How to Diagnose and Resolve 900% CPU Spikes in MySQL and Java Processes

This article explains common scenarios that cause MySQL or Java processes to consume 900% CPU, walks through step‑by‑step diagnosis using Linux tools, and provides concrete optimization techniques such as indexing, caching, thread analysis, and code adjustments to bring CPU usage back to normal levels.

CPUJavaMySQL
0 likes · 11 min read
How to Diagnose and Resolve 900% CPU Spikes in MySQL and Java Processes
Java Tech Enthusiast
Java Tech Enthusiast
Jun 9, 2024 · Information Security

Exploring Hidden x86 CPU Instructions and Their Security Implications

The article investigates undocumented x86 opcodes, describing a depth‑first search that uses page‑faults to locate hidden instruction boundaries, and reports finding dozens of executable but undocumented instructions on Intel and AMD CPUs, highlighting potential security risks and the need for vigilant hardware analysis.

CPUReverse EngineeringX86
0 likes · 9 min read
Exploring Hidden x86 CPU Instructions and Their Security Implications
Beijing SF i-TECH City Technology Team
Beijing SF i-TECH City Technology Team
May 30, 2024 · Operations

Root Cause Analysis of CPU Sys Spikes and Memory Pressure in Linux Services

This article investigates two real‑world performance incidents—one caused by excessive disk I/O from a misconfigured Filebeat and another by kernel memory‑fragmentation bugs triggered by a trace feature—detailing observations, Linux diagnostic commands, analysis, and practical remediation steps.

CPUOpslinux
0 likes · 15 min read
Root Cause Analysis of CPU Sys Spikes and Memory Pressure in Linux Services