What Is UALink? The Open High‑Performance Interconnect Shaping AI Accelerator Clusters

Background and Goals of UALink

As AI models grow explosively in size, the required compute clusters and interconnect performance have reached unprecedented levels. Proprietary solutions like NVIDIA's NVLink limit participation and foster ecosystem fragmentation. UALink was created to address these challenges by providing an open, high‑performance, and scalable interconnect standard for large AI accelerator clusters.

The main objectives of UALink are:

Open standard: any vendor can adopt and contribute, fostering ecosystem innovation.

High performance: bandwidth and latency comparable to or exceeding NVLink.

Scalability: support for connecting thousands to tens of thousands of accelerators.

Cost‑effectiveness: standardization reduces development and deployment costs.

Flexibility: multiple topologies and communication modes to suit diverse AI workloads.

UALink Architecture and Protocol Stack

UALink 1.0 defines a data rate of up to 200 GT/s per lane, with a signaling rate of 212.5 GT/s, meeting the bandwidth needs of Ethernet Layer 1 FEC and additional encoding. Channels can be configured as x1, x2, or x4, forming a station that provides up to 800 Gbps in each direction. This flexible configuration allows the number of accelerators and per‑accelerator bandwidth to be scaled according to application demands.

The UALink switch (ULS) can connect up to 1 024 accelerators or endpoints, assigning each a unique 10‑bit routing identifier. Virtual Pods group one or more accelerators for isolated communication within a larger Pod, enabling fine‑grained resource management.

UALink’s protocol stack consists of four layers:

Physical layer: Reuses IEEE 802.3dj Ethernet, supporting 106.25 GT/s (low‑speed) or 212.5 GT/s (high‑speed) modes, corresponding to 100 G–800 G bandwidth configurations. Enhanced coding and FEC reduce latency.

Data link layer: Aggregates 64‑byte transaction flits into 640‑byte flits for the physical layer and provides messaging services for rate advertisement, device/port discovery, and firmware communication.

Transaction layer: Converts protocol messages from the UALink Protocol Layer Interface (UPLI) into transaction‑layer flits (TLFlit) and vice‑versa, employing address caching to improve efficiency.

Protocol layer: The topmost layer handles accelerator‑to‑accelerator messaging with a symmetric protocol, processing messages through multiple functional sub‑layers.

By offering an open, high‑performance interconnect, UALink aims to drive a technological revolution in AI accelerator networking and lay a solid foundation for future ultra‑large AI compute infrastructures.