10 years of backend architecture design | AI engineering infrastructure, storage architecture design, and performance optimization | Former senior developer at NetEase, Douyu, Inke, etc.
This article explains the Compare‑and‑Swap (CAS) mechanism, its hardware‑level implementation via Java’s Unsafe class, provides sample code for basic CAS, atomic adders, custom atomic types, analyzes the ABA problem, and presents solutions such as versioned stamps and AtomicStampedReference.
This article explains the concept of false sharing in CPU caches, demonstrates its performance impact with Java code, analyzes the results, and shows how to prevent it using the @Contended annotation and appropriate JVM flags.
This article explains the semantics of Java's final keyword, how the compiler and JVM enforce immutability and memory‑barrier rules, and why final fields provide thread‑safe, write‑once‑read‑many behavior for both instance and static variables.
This article explains the purpose, usage scenarios, and memory semantics of Java's volatile keyword, demonstrates its behavior with code examples and memory barrier concepts, and summarizes how volatile ensures visibility and ordering across threads.
This article explains the Java Memory Model, covering how it validates reads, the distinction between shared and exclusive memory areas, data‑race scenarios with example code, visibility challenges, and the JMM‑based solutions such as volatile, synchronized, and memory barriers to prevent harmful reordering.
This article demonstrates how the volatile keyword influences thread communication in Java, compares client and server JVM modes, analyzes resulting memory visibility and reordering effects, and explores atomicity limits with bytecode examples and practical recommendations.
This article explains the core concepts of the Java Memory Model (JMM), compares its semantics with sequential consistency, analyzes sample code illustrating reordering and data races, and outlines synchronization and happen‑before principles that ensure correct multithreaded behavior.
This article explains the JVM's synchronized lock implementation, detailing where lock data is stored, the different lock states (no lock, biased, lightweight, heavyweight), the source code for lock acquisition and release, and the optimization strategies used to improve performance.
This article explains how Java’s synchronized keyword relies on JVM monitorenter/monitorexit instructions to enforce strong memory consistency, compares execution results with and without synchronization, and details the underlying memory semantics, benefits, and performance drawbacks.
CPU caches, organized into L1‑L3 levels, accelerate memory access by exploiting locality, but their independent copies can cause data inconsistency across cores; coherence protocols such as MESI and memory‑barrier instructions ensure that reads and writes remain ordered and visible across all processors.
