Tagged articles

compute architecture

4 articles · Page 1 of 1

Jul 14, 2026 · Artificial Intelligence

How Agents and Native Liquid Cooling Redefine AI Compute Architecture with Millisecond Latency

The article analyzes the shift from single-model inference to massive, continuously running AI agents, explains why CPU power now rivals GPU, describes Inspur's native liquid‑cooled 0.5U servers that pack 384 CPUs per rack, and shows how multi‑modal fusion cuts token latency to 4.77 ms, heralding an industrial‑scale, collaborative AI era.

AI agentsInspurcompute architecture

0 likes · 11 min read

How Agents and Native Liquid Cooling Redefine AI Compute Architecture with Millisecond Latency

Machine Heart

May 10, 2026 · Artificial Intelligence

Why SRAM Is Key to Overcoming GPU Limits in Inference as Demand Soars

As large‑model inference demand outpaces training, the decode stage hits a memory‑wall that GPUs cannot efficiently cross; SRAM’s on‑chip bandwidth and low‑energy access open a path forward, though capacity and process limits still pose challenges.

AI hardwareGPUSRAM

0 likes · 7 min read

Why SRAM Is Key to Overcoming GPU Limits in Inference as Demand Soars

Architects' Tech Alliance

Apr 2, 2019 · Artificial Intelligence

Breaking the Storage Wall: In‑Memory Computing and Integrated Compute‑Storage Architectures for AI

The article examines the growing bottlenecks of traditional compute architectures, explains why breaking the storage wall through high‑bandwidth communication, near‑data processing, and in‑memory compute is essential for AI workloads, and surveys the principles, advantages, challenges, future directions, and key industry players of integrated compute‑storage chips.

AI chipsAI hardwarecompute architecture

0 likes · 13 min read

Breaking the Storage Wall: In‑Memory Computing and Integrated Compute‑Storage Architectures for AI

Architects' Tech Alliance

Jan 30, 2019 · Industry Insights

Breaking the Storage Wall: How In‑Memory Computing Is Shaping AI Chip Design

The article analyzes the growing bottlenecks in compute architecture and memory, explores high‑bandwidth communication, near‑data processing, and in‑memory computing techniques, evaluates their advantages, challenges, and future prospects, and highlights key industry players driving the shift toward integrated compute‑storage chips.

AI chipsIndustry Insightscompute architecture

0 likes · 14 min read

Breaking the Storage Wall: How In‑Memory Computing Is Shaping AI Chip Design