1 views collected around this technical thread.
This article introduces Java’s emerging Vector API, explains its SIMD‑based design, provides practical code examples for array addition, dot product, and complex calculations, and details performance benchmarks, integration with vector databases, usage considerations, and future development prospects.
This article introduces Flex, a Flink‑compatible stream‑batch vectorized engine built on Velox and Gluten, explains the SIMD‑based execution model, details native operator optimizations, fallback mechanisms, correctness and usability improvements, and presents performance results and future development plans.
In just two weeks, engineer Adam Majmudar designed and implemented a minimalist GPU called tiny‑gpu—complete with a custom 11‑instruction ISA, Verilog RTL, and verified via OpenLane—sharing the open‑source project on GitHub, earning thousands of stars, and preparing it for fabrication through Tiny Tapeout 7, showcasing how modern tools make DIY chip design increasingly accessible.
This article details how ByteDance's cloud‑native observability team tackled performance bottlenecks in their metricserver2 Agent—reducing memory copies, merging tiny packets, applying SIMD for tag parsing, and switching compression libraries—to cut CPU usage by over 10% and memory usage by nearly 20% while handling petabyte‑scale metric data.
Sonic‑CPP, an open‑source C++ JSON library co‑developed by ByteDance’s STE and Service Framework teams, leverages SIMD vectorization, optimized memory layout, on‑demand parsing, and a compact DOM design to achieve up to 2.5× faster parsing than RapidJSON and competitive serialization performance, with extensive benchmark results and production‑grade usage.
This article explains the motivation, design, and implementation of vectorizing Apache Doris's storage layer using SIMD techniques, covering engine overview, vectorized programming concepts, storage architecture, index and predicate optimizations, delayed materialization, output improvements, and performance test results.
Bilibili’s WasmPlayer is a WebAssembly‑based HEVC software decoder that runs entirely in C/C++, handling demuxing, decoding, resampling and A/V sync on worker threads, using SIMD, AudioWorklet and OffscreenCanvas to deliver smooth 4K 60 fps web video playback with reduced bandwidth and CPU load.
This article introduces graph databases, explains the subgraph‑matching problem, compares it with relational databases, discusses its computational complexity, and surveys backtracking and multi‑way join algorithms, worst‑case optimal joins, set‑intersection SIMD acceleration, and the gStore system’s research contributions.
The article narrates a CPU's journey from a naïve element‑wise increment loop to the adoption of SIMD, MMX, SSE, and AVX instruction sets, illustrating the motivations, challenges, and architectural decisions behind parallelizing integer and floating‑point operations.
This article explains how Apache Doris adopts CPU‑level vectorization and columnar storage to boost query performance, details the design and current status of its vectorized engine, and outlines future work such as JOIN acceleration, storage‑layer vectorization, import optimization, and extensive SQL function support.
This article presents a backend‑focused study on reducing latency of vector‑based ad recommendation retrieval by leveraging Gonum, SIMD AVX2 intrinsics, and direct Plan9 assembly integration in Go, and it validates the approach with detailed performance benchmarks and CPU usage analysis.
This article details the engineering optimizations applied to the image cropping stage of Kuaishou's YKit AI SDK, covering instruction-level fixes, SIMD acceleration, I/O cache improvements, algorithmic refinements, parallel processing, and device‑tier strategies to achieve up to 4.6× speedup on mobile devices.
This article explains how Apache Doris adopts CPU vectorization techniques—such as SIMD, columnar storage, and cache‑friendly designs—to boost query performance, detailing its current vectorized engine architecture, recent benchmarks, ongoing work on JOIN, storage, import, and future enhancements.
This article introduces the B16 hash table, a novel design that deliberately tolerates a higher hash‑collision probability and leverages SIMD instructions to achieve faster lookups, lower memory overhead, and a compact read‑only variant comparable to minimal perfect hash functions.
Rust 1.54.0 introduces support for invoking function‑like macros within attributes, enabling inclusion of external documentation via include_str! and nested macro usage, while also stabilizing many wasm32 intrinsics—including safe SIMD functions like v128_bitselect—expanding WebAssembly capabilities.
This article systematically explores concurrency optimization for high‑performance C++ engineering, covering CPU trends, SIMD and out‑of‑order execution, single‑thread parallelism, lock‑free and wait‑free synchronization, and practical case studies of counters and queues to improve multithreaded scalability.
The article reviews Baidu C++ engineers' concurrency optimizations, explaining why modern software must exploit parallelism and detailing SIMD vectorization, out‑of‑order execution, and micro‑architectural analysis, then compares mutex, lock‑free, and wait‑free synchronization, showcasing case studies where atomic and wait‑free designs dramatically improve multithreaded performance.
JDK 16, released on March 16, introduces the Vector API—a set of Java interfaces that translate scalar operations into SIMD instructions, dramatically reducing operation counts and delivering 2‑5× speedups for matrix multiplication and up to 14‑16× for vector dot products, with notable contributions from Tencent’s Kona JDK team.
The article explains how SIMD acceleration on Qualcomm’s Hexagon DSP, using its HVX vector engine and specialized instructions, can off‑load compute‑intensive tasks such as image, video, and AI processing from the CPU, delivering up to 8× speed‑up, lower power consumption, reduced thermal throttling, and longer battery life on mobile devices.
With the rise of mobile, IoT, and edge computing, the long‑standing dominance of x86 is challenged, prompting developers to migrate applications to ARM‑based Kunpeng platforms; this article explains the architectural differences, a five‑step migration methodology, and detailed C/C++ compilation considerations including instruction, macro, and SIMD adaptations.