ESP32‑S31 Debuts with Dual‑Core RISC‑V, 62 GPIO and Gigabit Ethernet

Espressif is developing a new powerful wireless microcontroller, the ESP32‑S31.

The chip is a dual‑core RISC‑V MCU that combines a high‑performance RV32IMAFCP core (with FPU and SIMD instructions) and a low‑power RISC‑V core. It provides 62 GPIO pins, a gigabit Ethernet MAC, Wi‑Fi, Bluetooth and 802.15.4 (Thread/Zigbee/Matter) wireless connectivity.

Key specifications include:

512 KB SRAM, 32 KB RTC SRAM, support for up to 64 MB external octal PSRAM and flash

GPU – 2D pixel‑processing accelerator (PPA)

VPU – (M)JPEG codec support

Display interface – parallel LCD; Camera interface – MIPI‑CSI with integrated ISP and parallel camera interface; Audio – 2 I2S

Gigabit Ethernet, 2.4 GHz Wi‑Fi 802.11 b/g/n, Bluetooth, 802.15.4 for Zigbee, Thread and Matter

USB OTG

4 MCPWM channels (motor‑control PWM)

4 UART, 2 I2C, 2 SPI interfaces

ADC, touch sensor, system timers (2 counters, 3 alarms)

eFuse with key‑usage fields, flash encryption (XTS‑AES‑128/256), 128‑byte granularity physical memory protection (PMP), hardware crypto (AES, SHA, RSA, ECC)

The above parameters were compiled from the ESP32 forum and the ESP‑IDF source files esp32s31.peripherals.ld and soc_caps.h; the author notes that the list may contain errors or omissions.

Compared with the ESP32‑P4, the ESP32‑S31 has only one high‑performance RISC‑V core (the P4 has two) and lacks an H.264 VPU as well as MIPI DSI and CSI interfaces, which limits its multimedia capabilities. Nevertheless, it may be the most capable wireless SoC Espressif has released so far, offering the highest GPIO count (62) among ESP32 devices and supporting gigabit Ethernet.

Thanks to Loic for providing the information.