What’s New in the Upcoming ESP32‑S31 Compared to the ESP32‑P4?

Espressif is developing a new powerful wireless microcontroller, the ESP32‑S31.

The chip is a dual‑core RISC‑V MCU that combines a high‑performance RV32IMAFCP core with FPU and SIMD instructions and a low‑power RISC‑V core. It provides 62 GPIO pins, a gigabit Ethernet MAC, 2.4 GHz Wi‑Fi (802.11b/g/n), Bluetooth, and 802.15.4 support for Thread, Zigbee and Matter.

Memory resources include 512 KB SRAM, 32 KB RTC SRAM, and support for up to 64 MB of external octal PSRAM or flash. Integrated peripherals comprise a 2D pixel‑processing GPU, an (M)JPEG VPU, a parallel LCD display interface, a MIPI‑CSI camera interface with ISP, two I2S audio channels, USB OTG, four motor‑control PWM units, four UARTs, two I2C ports, two SPI ports, ADC, touch sensor, system timers, and security features such as eFuse with key‑purpose fields, flash encryption (XTS‑AES‑128/256), 128‑byte granularity PMP, and crypto engines (AES, SHA, RSA, ECC).

Compared with the ESP32‑P4, the ESP32‑S31 has only one high‑performance RISC‑V core (the P4 has two) and appears to miss the H.264 VPU, MIPI‑DSI and MIPI‑CSI interfaces, limiting its multimedia functionality.

Despite these omissions, the ESP32‑S31 may be Espressif’s most capable wireless SoC to date, offering the highest GPIO count (62) among ESP32 devices and built‑in gigabit Ethernet. The specifications were compiled from the ESP32 forum and the ESP‑IDF source files esp32s31.peripherals.ld and soc_caps.h.