How a Simple Switch Becomes a Powerful CPU: From Transistors to Logic Gates

Transistor as a Binary Switch

A transistor is a three‑terminal device that behaves as an electronic switch: applying a voltage to the control terminal (gate/base) enables current to flow between the other two terminals (source‑drain or collector‑emitter); without that voltage the path is blocked. This simple on/off behavior is the foundation of all digital circuitry.

Basic Logic Gates Constructed from Transistors

By interconnecting transistors you can realise the three universal Boolean gates:

AND – output is high only when both inputs are high.

OR – output is high when at least one input is high.

NOT – output is the logical complement of the input.

The conventional symbols are shown below:

Logical Completeness

AND, OR, and NOT form a functionally complete set: any Boolean function can be expressed by a network of these three gates. Consequently, arbitrary computation can be built from only these primitive components.

Binary Addition Using Gates

Binary addition requires two outputs: the sum and the carry . The truth table is:

0 + 0 → sum 0, carry 0

0 + 1 → sum 1, carry 0

1 + 0 → sum 1, carry 0

1 + 1 → sum 0, carry 1

The carry is produced by an AND gate. The sum is produced by an XOR gate, which can be built from AND, OR, and NOT (e.g., sum = (A OR B) AND NOT (A AND B)). The resulting half‑adder circuit is:

Memory Elements: NAND‑Based Latch and D‑Flip‑Flop

A pair of cross‑coupled NAND gates forms an SR latch with two stable states, representing a stored bit (0 or 1). Adding a data input (D) yields a gated D‑flip‑flop that can be written by asserting D while the latch is enabled.

Connecting many flip‑flops in parallel creates a register (multi‑bit storage). Adding address decoding logic to a bank of registers yields random‑access memory (RAM). Because these cells rely on power to maintain their state, they are volatile: data is lost when power is removed.

Arithmetic‑Logic Unit (ALU)

The ALU is the combinational block that performs arithmetic (addition, subtraction, etc.) and logical operations (AND, OR, XOR, NOT). The half‑adder shown earlier is a minimal ALU; a full CPU uses a more complex ALU that can chain multiple adders, incorporate subtraction via two’s complement, and provide bitwise logic.

Instruction Set Architecture (ISA)

The CPU executes instructions that specify which primitive operation to perform and on which operands. A simple 16‑bit ISA might allocate the high‑order 4 bits for the opcode and the remaining 12 bits for operand fields (e.g., register identifiers). An example encoding for “add R6, R2” is illustrated below:

Clock Signal as Global Synchronizer

A periodic clock signal provides a global timing reference. On each rising (or falling) edge, all state‑holding elements (flip‑flops, registers) capture their inputs, ensuring that data moves through the datapath in lockstep. The clock frequency (e.g., 3 GHz) determines how many instruction cycles can be performed per second.

Putting It All Together: The CPU

By integrating an ALU, a set of registers, volatile memory, an instruction decoder, and a clock, you obtain a Central Processing Unit (CPU). The CPU fetches encoded instructions from memory, decodes the opcode, routes operands to the ALU, stores results, and repeats this cycle under clock control, thereby executing arbitrary software programs.