Fundamentals 6 min read

How Does RAM Actually Store Data? Inside Static and Dynamic Memory

This article explains the fundamentals of data storage in computers, covering the concepts of RAM, the differences between static SRAM and dynamic DRAM, and how memory controllers manage refresh cycles and address translation to enable efficient read/write operations.

Architect's Guide
Architect's Guide
Architect's Guide
How Does RAM Actually Store Data? Inside Static and Dynamic Memory

1. How Data Is Stored

Because data storage is essential, scientists have long explored how circuits can retain information.

If a device constantly outputs a high level, that represents a 1; a constant low level represents a 0, and the ability to switch freely between them is required.

Enter the memory module.

2. RAM

Memory modules are formally called RAM (Random Access Memory) because data can be read from or written to any location at will.

Computers operate in binary, representing all data and instructions as strings of 0s and 1s.

To store a single bit, early engineers considered two circuit approaches. The first is a static solution:

This static SRAM (Static Random Access Memory) can hold a stable state between 0 and 1, but it requires many transistors per bit, making large capacities costly and physically large.

The second approach uses a single capacitor to store charge, representing a 1 or 0:

Each memory chip contains many such bit cells; for example, a 16 GB module holds 137,438,953,472 bits, each stored in a capacitor.

However, capacitors leak charge over time, causing the voltage to drop and making it impossible to distinguish between 0 and 1.

To solve this, the cells must be periodically refreshed, a process known as dynamic data refresh, giving rise to DRAM (Dynamic Random Access Memory).

3. Memory Controller

When reading data, the system must specify the chip, bank, row address, and column address to locate a particular bit.

To simplify this complexity, a memory controller acts as an intermediary between the CPU and the memory modules.

The controller manages the required refresh cycles—typically every 64 ms—to prevent charge loss in the capacitors.

Memory modules are organized into chips, each divided into banks and further into rows and columns; the controller translates a single address into the appropriate chip, bank, row, and column.

Modern CPUs integrate the memory controller, and as CPU speeds increased, caches were added inside the CPU to store frequently accessed data, reducing the need to fetch everything from main memory.

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RAMcomputer architecturehardware fundamentalsMemory ControllerDRAMSRAM
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