How Nvidia GH200 and AMD MI300A Are Redefining CPU‑GPU Memory Integration

Historically, CPUs such as the early 8086/8088 required an optional 8087 math co‑processor for floating‑point operations, while modern CPUs have integrated these capabilities. Today, the industry is witnessing a similar integration of high‑performance SIMD units—GPUs—directly into the processor package, a development exemplified by Nvidia’s GH200 and AMD’s MI300A.

Eliminating the PCIe Bottleneck

Traditional CPU‑GPU systems rely on the PCIe bus to transfer data between separate memory domains, limiting bandwidth to roughly 63 GB/s when all 16 PCIe 5.0 lanes are used. Nvidia’s GH200 replaces this bottleneck with a 900 GB/s bidirectional NVLink‑C2C link that unifies the memory space of the Grace CPU and Hopper GPU. The result is a single coherent memory domain of 576 GB–624 GB, combining up to 480 GB of LPDDR5X (ECC) on the CPU side with 96 GB–144 GB of HBM3(e) on the GPU side.

AMD’s Instinct MI300A APU adopts a similar single‑memory‑domain approach, offering 128 GB of HBM3 shared between CPU and GPU via Infinity Fabric, with a peak package throughput of 5.3 TB/s. Although MI300A lacks the additional DDR memory expansion found in GH200, its unified memory model foreshadows broader adoption of CXL‑based interconnects.

Benchmark Highlights

Early benchmark data, collected by Phoronix using a remote GPTshop.ai workstation equipped with GH200, focus primarily on CPU‑only workloads (no Hopper GPU involved). Despite this limitation, the results illustrate the performance potential of the unified architecture.

HPCG Memory Bandwidth : GH200 achieved approximately 42 GFLOPS, slightly surpassing the Intel Xeon Platinum 8380 (40 GFLOPS) and trailing the AMD EPYC 9654 Genoa (44 GFLOPS). The 72‑core Grace CPU delivered nearly double the performance of the 128‑core Ampere Altra Max.

NWChem (C240‑Bucky Ball) : Running on the 72‑core GH200 took 1 404 seconds, only 81 seconds slower than the leading 128‑core EPYC 9554 (1 323 seconds), demonstrating competitive performance despite the absence of the Hopper GPU in the test.

Implications for HPC and Generative AI

The unified memory domain simplifies programming models for large‑scale HPC and generative‑AI workloads, allowing entire models to reside in a single address space without costly PCIe data shuffling. This architecture also enables future extensions, such as external NVLink connections that can provide up to 20 TB of coherent memory (e.g., Nvidia‑AWS NLV32).

From a market perspective, the shift mirrors the historic “8087 moment” where CPUs absorbed specialized co‑processors. As generative‑AI demand grows, the cost barrier for such high‑end systems is expected to decline, potentially bringing desktop‑class unified memory workstations within reach of power users.

Future Outlook

Both Nvidia and AMD are positioning their latest chips as the foundation for the next generation of HPC and AI platforms. While the GH200 and MI300A are currently premium products, continued benchmark releases and broader software support will likely accelerate adoption. The industry is moving from niche, expensive solutions toward commodity‑grade hardware that offers massive shared memory, paving the way for more accessible high‑performance computing.