At the 2026 North America Technology Forum, TSMC unveiled a complete 2026‑2029 process roadmap, naming the A12 (1.2nm) and A13 (1.3nm) nodes, adding the N2U extension, and announcing that no High‑NA EUV will be required through 2029, signaling a dual‑track strategy for mobile and AI/HPC workloads.
This article examines Broadcom's Scale Up Ethernet (SUE) framework, detailing how it addresses AI/HPC rack‑scale interconnect challenges by delivering ultra‑high bandwidth, microsecond‑level latency, memory‑semantic operations, and seamless compatibility with existing Ethernet infrastructure for large XPU clusters.
This article explains the fundamentals of high‑performance computing (HPC), covering serial and parallel processing, the roles of CPUs and GPUs, system architectures, FLOPS metrics, current supercomputer capabilities, and the scale needed to reach the next exa‑FLOPS era.
This article surveys prominent multikernel operating systems—including Barrelfish, fos, Popcorn Linux, Twin‑Linux, IHK/McKernel, mOS, and RainForest—detailing their design principles, implementation approaches, performance results, and the evolution of research over the past decade.
This article surveys prominent multi‑kernel operating systems—including Barrelfish, fos, Popcorn Linux, Twin‑Linux, IHK/McKernel, mOS and RainForest—explaining their design principles, performance benefits, scalability on heterogeneous hardware, observed limitations, and the broader research trajectory.
The article explains RDMA's low‑latency, CPU‑bypass communication by detailing the roles of Queue Pairs, Work Queue Entries, and the Doorbell mechanism, comparing them with traditional TCP/IP and outlining their state machines, data structures, and notification workflow.
This article traces the evolution of NVIDIA GPU architectures—from the early Tesla series through Fermi, Kepler, Maxwell, Pascal, Volta, Turing, Ampere, Hopper, and up to the upcoming Blackwell—explaining their hardware innovations, CUDA programming model, and how each generation enabled breakthroughs in high‑performance computing, deep learning, and AI applications.
This article analyzes the concept, core functions, industry chain, infrastructure components, and rapid market growth of AI Data Centers, highlighting their distinction from traditional data centers, regional concentration in eastern China, and projected investment and compute capacity through 2028.
This article analyzes NVIDIA's evolving AI supercomputer architectures—detailing the H100‑based 256‑GPU SuperPod, the GH200‑based 256‑GPU SuperPod with integrated Grace CPU, and the GB200‑based 576‑GPU SuperPod—examining their NVLink and InfiniBand topologies, bandwidth limits, and scalability challenges.
The article analyzes China’s rapid expansion of intelligent computing centers, covering market forecasts, government policies, regional deployment patterns, major telecom operators' strategies, the industry value chain, and future trends that together signal a sustained surge in AI‑focused compute infrastructure across the nation.
This article analyzes how the traditional OSI/TCP‑IP model is giving way to RDMA in high‑performance computing, compares Ethernet, InfiniBand and RoCE, evaluates leaf‑spine versus three‑tier data‑center designs, and examines NVIDIA SuperPOD architectures with detailed technical metrics.
The article summarizes key Argo Workflows sessions from KubeCon Europe 2025, covering rapid community growth, unified AI/HPC orchestration, event‑driven workflows, platform‑engineering foundations, and diverse real‑world use cases, while linking to relevant talks and resources.
AI large‑model training relies on GPU clusters, generating massive inter‑node traffic that turns network performance into the primary bottleneck, prompting a detailed comparison of InfiniBand and RoCE protocols, their histories, strengths, limitations, and the need for next‑generation network chip architectures.
The article analyzes NVIDIA's Rubin288 high‑density GPU cabinet, comparing its orthogonal CLOS architecture with the older non‑orthogonal designs, and explains how the new layout improves reliability, bandwidth, scalability, and cooling for modern data‑center HPC deployments.
The article explains how the newly approved national cloud‑HPC standard, co‑created by Alibaba Cloud and the China Electronics Standardization Institute, addresses resource limits, reduces costs, and guides industry adoption across sectors such as automotive, semiconductor design, and weather forecasting.
This article provides an in‑depth overview of NVIDIA’s latest GPU families—including A100/A800, H100/H200/H800, B100/B200, and L40S—detailing their release backgrounds, key specifications, typical application scenarios, and pricing to help readers understand their performance and market positioning.
The article provides an in‑depth analysis of HPE Cray’s upcoming EX supercomputing platforms, detailing unprecedented GPU density, liquid‑cooling architecture, the high‑speed Slingshot 400 interconnect, and complementary ProLiant Compute XD servers, while outlining release timelines and performance targets for AI and traditional HPC workloads.
The article provides an in‑depth analysis of HPE’s latest Cray EX supercomputing platforms, detailing their GPU density, performance benchmarks, liquid‑cooling architecture, Slingshot 400 interconnect, upcoming storage solutions, and alternative ProLiant Compute XD servers for AI workloads.
The article examines the El Capitan supercomputer unveiled at SC24, detailing its AMD CPU‑GPU hybrid architecture, benchmark results, its dominance in the November 2024 Top500 list, and the broader implications for high‑performance computing, AI workloads, and the competitive landscape between AMD and NVIDIA.
The 2024 HiMCM competition releases two modeling challenges—Problem A asks teams to develop a quantitative model for selecting Olympic sports for the 2032 Brisbane Games based on IOC criteria, while Problem B requires assessing the environmental impact of high‑performance computing and proposing sustainable solutions.
The Venado supercomputer, built for Los Alamos National Laboratory, combines Nvidia Grace CPUs with Hopper GPUs, leverages high‑bandwidth memory and Slingshot interconnects, and targets a balanced 80/20 CPU‑GPU workload split to support demanding AI and HPC applications.
The article provides an in‑depth technical overview of NVIDIA's Grace Hopper superchip, detailing its heterogeneous CPU‑GPU architecture, high‑bandwidth NVLink‑C2C interconnect, unified memory model, programming support, and system‑level scaling features that together deliver unprecedented performance for high‑performance computing and large‑scale AI workloads.
The report examines the 2023 global HPC market—covering on‑premise servers, cloud services, storage, compute engines, and interconnect technologies—showing total spending of $297 billion, forecasting growth to $437 billion by 2028, and highlighting key hardware trends, cloud adoption rates, and emerging AI‑driven workloads.
This article details Shanghai Jiao Tong University's design and deployment of the nation’s first campus‑level high‑performance computing cluster based on Huawei Kunpeng 920 ARM processors, covering background, user challenges, unified storage, network topology, containerized software delivery, and performance validation with LAMMPS and GATK.
The article explains how Baidu Cloud's CHPC platform offers a full‑stack, hybrid‑cloud HPC solution with modern hardware, dynamic scheduling, elastic scaling, and performance tuning, enabling enterprises in life sciences and manufacturing to cut costs, accelerate innovation, and efficiently manage compute workloads.
This article presents a comprehensive overview of Xiaohongshu's heterogeneous training and inference engine, covering the challenges of model engineering, the design of elastic heterogeneous engines, future HPC training frameworks, AI compilation techniques, and a forward‑looking outlook on scalability and performance.
The Venado supercomputer, unveiled at Los Alamos, combines Nvidia Grace CPUs, Hopper GPUs, HPE Slingshot interconnects, and massive memory bandwidth to achieve a 15.6‑petaflop FP64 peak, illustrating the evolving balance between CPU and GPU workloads in modern high‑performance computing.
The article examines the rise of the Ultra Ethernet Consortium (UEC), its new specifications, and how industry leaders like Broadcom, Nvidia, and Meta are shifting from InfiniBand to RoCE to meet the high‑throughput, low‑latency demands of AI and HPC workloads, highlighting technical advantages and future trends.
The article introduces Alibaba Cloud's newly commercialized HPC8ae optimized instance, details its hardware specifications, eRDMA support, and AVX‑512 capability, and walks through single‑node motorcycle airflow and multi‑node 60‑million‑cell wind‑farm simulation demos using OpenFOAM on the EHPC platform.
The article provides a detailed technical analysis of RoCE (RDMA over Converged Ethernet), its two protocol versions, packet overhead, congestion‑control mechanisms, Soft‑RoCE implementation, and the challenges and performance implications of deploying RoCE in modern HPC environments compared to InfiniBand and traditional Ethernet solutions.
This article compiles detailed technical Q&A about NVIDIA's Quantum‑2 InfiniBand platform, covering compatibility of CX7 NDR ports, cabling options, switch connections, UFM deployment, PCIe bandwidth limits, and performance considerations for high‑performance computing clusters.
This article provides a comprehensive technical overview of InfiniBand, covering its rapid adoption in top supercomputers, detailed performance advantages such as ultra‑high bandwidth, CPU offload, sub‑microsecond latency, flexible scalability, QoS, SHARP acceleration, and a comparison with Ethernet, Fibre Channel, and Omni‑Path, while also outlining HDR switch and NIC product families.
This article provides an in‑depth technical analysis of NVIDIA NVLink, covering its evolution, the NVSwitch chip, NVLink‑enabled servers and switches, and a performance comparison with InfiniBand networks, highlighting its impact on high‑performance computing and artificial intelligence workloads.
The article examines Nvidia’s GH200 and AMD’s MI300A processors, highlighting their unified memory domains that eliminate PCIe bottlenecks, detailing benchmark results, power‑measurement challenges, and the broader industry shift toward integrated CPU‑GPU architectures for high‑performance and generative‑AI workloads.
This article explains the concept of data‑center compute power, reviews mature evaluation methods such as TOP500/FLOPS for supercomputers and SPEC CPU, SPECpower, and MLPerf for conventional servers, introduces the PUE efficiency metric, and summarizes the four core components that together define a data‑center's computing capability.
The article defines high‑performance computing, presents China's dominant share in the Top500 supercomputer rankings, details recent global and Chinese HPC market growth rates, forecasts market size to 2026, and cites multiple industry reports as sources.
The Hyperion Research ISC23 HPC Market Update briefing highlights modest 2022‑2023 growth, forecasts global HPC spending reaching $33 billion in 2023 and $52 billion by 2026, outlines ten key 2023 predictions—including AI regulation, cloud‑driven HPC expansion, and emerging DPU/IPU markets—while emphasizing the continuing talent shortage and the strategic importance of AI across high‑performance computing.
The article introduces HadaFS, a novel burst‑buffer file system that combines the scalability and performance of local burst buffers with the data‑sharing and cost advantages of shared buffers, details its LTA architecture, metadata handling, and evaluates its superior performance on the SNS supercomputer against BeeGFS and traditional GFS solutions.
Intel revealed its Aurora genAI project, a generative AI model with up to one trillion parameters that will run on the Aurora supercomputer—leveraging NVIDIA Megatron and Microsoft DeepSpeed frameworks, delivering over 2 Exaflops performance and targeting scientific as well as broader AI applications.
The article details India's C‑DAC‑designed Aum HPC processor, its 48‑core Neoverse V1 architecture, memory subsystem, interconnects, performance targets, and how it competes with Fujitsu’s A64FX, Nvidia’s Grace, and other Arm‑based CPUs in the high‑performance computing and AI markets.
The article describes how Shanghai Jiao Tong University built a campus‑level HPC platform using Huawei Kunpeng 920 ARM processors, detailing system architecture, unified storage and scheduling, containerized software deployment, network topology, Lustre file system integration, and performance results of LAMMPS and GATK compared with traditional X86 clusters.
This article provides a comprehensive overview of high‑performance computing, covering system architectures, hardware components, performance metrics, network topologies, common parallel file systems, cluster management functions, mainstream job‑scheduling systems, and MPI‑based parallel programming models.
This article examines the RoCE protocol—an RDMA‑enabled Ethernet technology—its evolution, technical details, congestion‑control mechanisms, performance comparisons with InfiniBand, practical deployment issues in HPC clusters, and real‑world case studies such as Slingshot and application benchmarks.
This article provides an in‑depth examination of InfiniBand, covering its rapid development as a high‑bandwidth, low‑latency interconnect technology, the InfiniBand Trade Association, detailed packet structures, layered architecture, switching mechanisms, and a comparative analysis with Ethernet, highlighting its advantages for high‑performance computing.
The article provides a detailed overview of NVIDIA's Grace CPU Superchip, describing its Arm‑based architecture, NVLink‑C2C interconnect, scalable coherency fabric, high‑bandwidth LPDDR5X memory, extensive I/O options, and software ecosystem, highlighting its suitability for HPC and AI workloads.
The article analyzes the 2022 global and Chinese supercomputing markets, detailing current market shares, growth trends, future market potential, and competitive dynamics, while highlighting China's rapid performance gains, domestic chip localization, and shifting supplier rankings in the high‑performance computing sector.
The article provides a detailed technical overview of Fujitsu's ARM‑based A64FX processor, its design origins, specifications, network architecture, and how it enables the Fugaku supercomputer to achieve world‑leading performance while illustrating broader trends in high‑performance computing hardware.
The article provides a comprehensive technical overview of NVIDIA's Grace Hopper Superchip, detailing its heterogeneous CPU‑GPU design, high‑bandwidth NVLink‑C2C interconnect, performance advantages for HPC and AI workloads, programming model, and the architectural innovations that enable unprecedented scalability and productivity.
The 2022 Hyperion Research HPC market report shows a $348 billion total market in 2021, with servers leading, HPC Cloud growing 23% to $62 billion, storage and AI‑enabled servers driving the fastest growth, and detailed forecasts for vendors, applications, networking, and operating‑system migration.
The 2022 TOP500 report reveals that Japan's Fugaku remains dominant, while China leads in system count, Intel and NVIDIA still dominate processors and accelerators, and the industry is shifting toward data‑intensive AI and big‑data workloads, reshaping the supercomputing landscape.
This article examines the RoCE protocol, its evolution and variants, lossless networking and congestion‑control mechanisms, practical performance measurements on HPC clusters, and the advantages and limitations of deploying RoCE in high‑performance computing environments.
The white paper released by the Supercomputing Innovation Alliance details the concept, architecture, product classifications, market outlook, and application scenarios of High‑Performance Computing Cloud (HPC Cloud), highlighting its integration with cloud, AI, big data, and multi‑cloud interconnectivity.
This article examines the RoCE protocol and its use in high‑performance computing, describing its low‑latency advantages, congestion‑control mechanisms, performance comparisons with InfiniBand, practical deployment issues, and real‑world case studies such as Slingshot and CESM/GROMACS benchmarks.
The article explains how the ASTRA high‑performance computing platform, built for translational medicine, integrates a three‑tier storage architecture with Intel's DAOS to overcome data‑intensive challenges, improve AI and big‑data workloads, and achieve top rankings on the IO500 benchmark.
The article analyzes how the shift of data centers toward compute-centric architectures drives the need for high‑performance networking, explains the shortcomings of TCP/IP, compares InfiniBand, iWarp and RoCE protocols, and shows why loss‑less Ethernet with RDMA is critical for modern HPC workloads.
The May 30, 2022 ISC 2022 announcement revealed that ORNL's Frontier became the first true exascale supercomputer with 1.102 exaflops, reshaping the Top500 rankings and highlighting the latest hardware configurations, regional distribution, Chinese HPC developments, and the shifting market share among major vendors.
This article explains the fundamentals of high‑performance computing, covering serial and parallel processing, heterogeneous CPU‑GPU architectures, FLOPS measurement levels, key terminology, and why HPC is essential for scientific and engineering simulations, while also noting market reports and resource links.
The article presents a detailed benchmark of AMD's Milan‑X 7773X processor, highlighting its 3D V‑Cache architecture and large 768 MB L3 cache, and demonstrates up to 1.80× speed‑up for HPC applications WRF and OpenFOAM on a dual‑socket NF5468A5 GPU server.
The article examines how GPUs have evolved from gaming accelerators to essential data‑center processors for AI, HPC, and scientific workloads, and compares the latest server‑grade offerings from Nvidia, AMD, and Intel—including performance specs, memory technologies, interconnects, and software ecosystems—highlighting the fierce competition shaping the future of compute.
The article examines how the United States is scrambling to match China's rapid deployment of exascale supercomputers, highlighting the technical, strategic, and geopolitical implications of this high‑performance computing rivalry.
The article explains how high‑performance computing (HPC) networks overcome TCP/IP limitations by using RDMA‑based technologies such as RoCE v1/v2 and InfiniBand, detailing their architectures, advantages, vendor implementations, and cost‑effective migration to Ethernet‑based solutions for GPU‑driven workloads.
This article provides a comprehensive overview of high‑performance computing (HPC), covering its definition, hardware architectures, performance metrics, cluster components, parallel file systems, management and scheduling tools, as well as common MPI implementations and links to further technical resources.
This article explains the fundamentals of high‑performance computing (HPC), covering its serial and parallel processing models, CPU and GPU roles, heterogeneous architectures, FLOPS performance metrics, market trends, and key terminology needed to grasp why HPC is essential for scientific and engineering simulations.
This article explains the fundamentals of high‑performance computing (HPC), covering serial and parallel processing, CPU vs GPU roles, heterogeneous architectures, FLOPS performance metrics, system design challenges, and why HPC is essential for large‑scale scientific and engineering simulations.
This article explains the fundamentals of high‑performance computing, covering its serial and parallel processing models, heterogeneous CPU‑GPU architectures, performance measurement in FLOPS, the scale needed for exaFLOPS systems, key terminology, and why HPC is essential for scientific and engineering challenges.
The article outlines major trends influencing high‑performance computing, including AI integration, GPU/TPU advancements, flexibility in processor architectures, HPC‑as‑a‑Service, hybrid cloud solutions, democratization, the emergence of exascale systems, and micro‑architectural improvements, while providing links to related reports and resources.
This article explains the concept of FLOPS, its measurement units, common benchmarks such as Linpack and MLPerf, why traditional HPC benchmarks may not suit AI workloads, and provides a comprehensive overview of hardware performance figures from GFLOPS to PFLOPS across various modern processors and supercomputers.
The article analyzes the rapid growth of the global data‑intensive HPC market, driven by AI and high‑performance data analysis workloads, outlines shifting storage demands, cloud‑HPC adoption, and the technical challenges and opportunities for future HPC storage architectures.
The article explains how modern data‑center compute demands drive the need for high‑throughput, low‑latency networking, compares TCP/IP with RDMA‑based solutions such as InfiniBand, iWARP and RoCE, and recommends loss‑less Ethernet for large‑scale HPC deployments.
The article explains high‑performance computing (HPC) concepts, including serial and parallel processing, supercomputer performance measured in FLOPS, real‑world scientific applications such as drug discovery and weather forecasting, and the hardware architectures that enable these massive computational capabilities.
The article analyzes IBM Spectrum Scale 5.0's new features—RDMA support, lock‑free reads, multi‑layer NVMe write cache, and variable SubBlock sizes—and demonstrates how they enable a next‑generation HPC supercomputer to meet demanding AI/ML/DL small‑file and large‑file I/O performance targets, with benchmark results showing up to 700% improvement.
The article provides a comprehensive analysis of the high‑performance computing (HPC) storage and networking market from 2020 to 2024, detailing component growth rates, vendor market shares, storage media trends, network interconnect preferences, and upcoming exascale system designs across the US, Japan, China, and Europe.
The 2020 HPC market summary and forecast report by Hyperion Research analyzes global high‑performance computing hardware sales, the impact of COVID‑19, the slowdown of on‑premise growth, rapid expansion of HPC cloud services, and provides detailed market size, CAGR, and segment forecasts through 2024.
The article examines how AMD, NVIDIA, and Intel are expanding their high‑performance computing portfolios through acquisitions and product development, focusing on FPGA, AI accelerators, and cloud‑centric strategies, and evaluates the technical and market implications of these moves.
The article explains GPU evolution, its integration with CPUs, interconnect technologies like PCIe and NVLink, market shares of NVIDIA, AMD and Intel, AI accelerator types (GPU, FPGA, ASIC), and the roles of training and inference in cloud AI, while also promoting a paid 182‑page PPT resource.
The article introduces IBM's General Parallel File System (GPFS), describing its distributed shared‑parallel design, core components such as the management command set, kernel extensions, and daemon processes, and outlines practical deployment and performance considerations, especially in HPC environments.
The article provides a comprehensive overview of the Lustre parallel file system architecture, its core components, POSIX compliance, scalability, high‑performance networking, security features, data layout mechanisms, and performance considerations for large and small files, along with practical optimization tips for HPC environments.
Burst Buffer is a storage acceleration technology that enhances I/O bandwidth and OPS for high‑performance computing by providing fast checkpoint/restart, temporary storage, and balancing SSD and parallel file system resources, with implementations from DDN, Cray, EMC, and IBM detailed for HPC designers.
On June 22, 2020, Japan's Fugaku supercomputer, built with Fujitsu's ARM‑based A64FX processors, claimed the top spot in all four TOP500 benchmarks, delivering 415.5 petaflops in Linpack and dramatically surpassing rivals while highlighting the growing impact of ARM architecture in high‑performance computing.
This article examines DeepL’s translation system, comparing its neural‑network‑driven output to Google and other services, detailing its Icelandic HPC infrastructure, data collection, architectural choices, language support, strengths, limitations, and expert opinions on why it often delivers more natural translations.
This article explains what a server cluster is, why organizations adopt clusters for performance, cost, scalability and reliability, outlines the main cluster categories such as load‑balancing, high‑availability and HPC, and offers guidance on selecting appropriate software and hardware solutions.
The article explains the concepts, principles, advantages, and key differences between parallel computing and distributed computing, highlighting their roles within high‑performance computing and when each approach is most appropriate.
This article surveys the rapid growth of GPU-accelerated high‑performance computing (HPC) applications driven by NVIDIA's ecosystem, detailing the most common scientific fields, the proportion of GPU‑supported tools, and the emerging role of AI as a primary growth engine.
The 54th TOP500 list released in November 2019 shows China and the United States still dominate in both the number and performance of supercomputers, with the total HPL performance reaching 1.65 exaflops and the entry threshold rising to 1.14 petaflops.
This article explains the fundamentals of parallel and distributed computing, their definitions, core principles, advantages, required conditions, and key differences, highlighting how each approach tackles large‑scale tasks within high‑performance computing environments.
The article explains how heterogeneous parallel computing—distributing tasks across CPUs, GPUs, FPGAs and other accelerators—has become essential after Moore’s law plateau, detailing its principles, hardware and software perspectives, classification of architectures, processing stages, user‑guided versus compiler‑guided methods, and its relevance to AI, cloud and industry workloads.
BeeGFS, an open‑source parallel file system originally developed by Fraunhofer, has emerged as a flexible, high‑performance alternative to GPFS and Lustre in HPC, driven by growing demands from large‑scale analytics, AI, and cloud storage, with expanding global adoption and ecosystem partnerships.
This article provides a comprehensive technical overview of IBM GPFS (General Parallel File System), detailing its core components, cluster management roles, networking models, and best‑practice building‑block configurations for high‑performance computing environments.
The article explains what Burst Buffer technology is, how it leverages flash/SSD storage to boost I/O bandwidth and operations per second in HPC environments, details NERSC's Cray DataWarp implementation, outlines the hardware and software architecture, and surveys similar solutions from other vendors.
This article curates a comprehensive list of technical resources covering backup system architectures, distributed technology designs, cloud computing frameworks, high‑performance computing, storage solutions, server virtualization, networking, big data, databases and AI, providing readers with links to in‑depth analyses and best‑practice guides.
The 52nd TOP500 list released in November 2018 shows US DOE machines dominating the top ten, highlights performance gains of Summit and Sierra, details the hardware of leading supercomputers worldwide, and analyzes country shares, manufacturers, accelerator usage, interconnect technologies, and energy‑efficiency rankings such as Green500 and HPCG.
The Intersect360 2016 survey of 474 HPC sites covering 723 compute systems, 633 storage systems and 638 LANs reveals that Ethernet and InfiniBand dominate system interconnect, storage and LAN networks, with Mellanox and Cisco accounting for over half of installations, while newer technologies such as 10 GE, 40 G, 56 G InfiniBand and Omni‑Path show evolving market shares driven by bandwidth and latency demands.
This article explains the concepts, principles, and key distinctions between parallel computing and distributed computing, describing their objectives, basic conditions, advantages, and typical use cases within high‑performance computing, and highlights how they differ from grid and cloud computing.
This article explains how high‑performance computing (HPC) supports oil‑field exploration by detailing the stages of seismic data acquisition, processing, and interpretation, the demanding computational and storage requirements, parallel communication patterns, checkpointing, and data lifecycle management, illustrating the role of HPC in modern geophysical workflows.
The article provides a comprehensive overview of High‑Performance Data Analytics (HPDA), detailing its market drivers, technical classifications, integration of HPC with big‑data workloads, Fujitsu's reference architecture, hardware configurations, benchmark results, and the economic benefits of deploying HPDA on existing HPC infrastructures.
This article provides a comprehensive guide to optimizing Lustre, the leading open‑source parallel file system for high‑performance computing, covering network bandwidth, stripe settings, client configuration, RAID choices, small‑file handling, and practical system commands to improve aggregate I/O performance.
The Intersect360 report surveys nearly 60 storage vendors across 391 high‑performance computing sites, revealing a 24% increase in total capacity to 2.4 EB since 2015, growing adoption of PB‑scale systems, dominant vendors DDN, Dell EMC and IBM, and a modest but rising share of cloud storage, while projecting market revenue to rise from $4.87 B in 2015 to $6.57 B by 2020.
DataDirect Networks (DDN) announced a non‑binding intent to acquire all assets of Tintri, a storage vendor known for VM‑aware solutions, aiming to strengthen its portfolio with virtualization, AI real‑time analytics, and HPC capabilities, while the deal raises questions about market competition and the future positioning of both companies.
The talk details XtraPi’s journey from early PBS‑based supercomputers to a modern Kubernetes‑driven, multi‑cloud platform that uses Tencent Cloud TKE to run massive containerized drug‑discovery simulations, describing scaling strategies, image optimization, CI pipelines, checkpoint‑restart, and future serverless and bare‑metal enhancements.
This article provides a comprehensive overview of the Lustre parallel file system, covering its architecture, key features, component roles, scalability, performance characteristics, and step‑by‑step configuration procedures for high‑performance computing environments.
