What Drives the AI Compute Chip Market? GPUs, ASICs, and the Rise of Chinese Players

AI Compute Chip Landscape

AI compute chips are mainly categorized into GPUs, FPGAs, and ASICs such as VPU and TPU. According to IDC forecasts, GPUs will still hold about 80% of the AI chip market by 2025. Compared with traditional graphics GPUs, general‑purpose compute GPUs remove rendering functions, offering higher compute‑to‑power efficiency for model training and inference.

Key Evaluation Metrics

Performance of AI chips is typically measured by three core indicators: compute capability, power consumption, and die area (PPA). Compute is expressed in TOPS or TFLOPS, power determines energy cost, and area influences manufacturing yield and overall cost.

Compute (TOPS/TFLOPS): Represents how many trillion operations the chip can perform per second; higher values mean faster processing.

Power: The electrical power required for operation; performance‑per‑watt is a critical efficiency metric.

Area: Chip die size; smaller area usually yields higher manufacturing yield and lower cost, while also affecting compute density.

Major Global Players

Nvidia’s GPGPU remains the most widely adopted AI accelerator. Its performance is driven by hardware parameters such as micro‑architecture, process node, number of CUDA cores, number of Tensor cores, clock frequency, memory capacity and memory bandwidth. Representative models include V100 (Volta), A100 (Ampere), and H100 (Hopper).

Chinese AI Compute Chip Landscape

Domestic companies are rapidly advancing in AI acceleration, offering a variety of training‑oriented and inference‑oriented products. Below is a snapshot of notable players and their flagship chips.

Cambricon: SiYuan 290 (cloud training, 512 TOPS INT8), SiYuan 370 (training‑inference, 256 TOPS INT8, first chiplet‑based design), and the upcoming SiYuan 590 (in development).

HaiGuang Information: DCU “Deep Compute One” chip, 7 nm process, CUDA‑compatible ecosystem, mass‑produced since 2021 for big‑data and AI workloads.

MuXi Integrated Circuit: MXN100 heterogeneous GPU (7 nm) for inference, MXC500 for training and general computing, with full volume production planned for 2024.

TianShu: Big Island cloud GPGPU, 7 nm, delivering 295 TOPS INT8.

Biren Technology: BR100 chip using chiplet technology, >1000 TOPS FP16 and >2000 TOPS INT8.

Suiruan Technology: CloudSui i20 inference accelerator, 12 nm process, performance comparable to 7 nm GPUs, 256 TOPS.

Kunlun Chip: R200 chip based on the XPU‑R architecture, offering significant performance gains for both training and inference, integrated with Baidu’s PaddlePaddle platform.

Pingtouge (Alibaba subsidiary): Two development lines: cloud‑centered GPUs (Yitian, Hanguang series) for data‑center compute, and RISC‑V‑based AIoT processors (XuanTie series) for edge applications.

Huawei AI Chip Portfolio

Huawei’s Ascend series includes the Ascend 310 (inference‑focused) and the Ascend 910B (training‑focused). The 910B supports FP32 and FP16 precision and delivers performance comparable to Nvidia’s A800/A100.

Market Outlook

The surge of large‑scale models such as ChatGPT is accelerating demand for AI compute power, benefiting both global leaders and emerging Chinese vendors. Domestic companies aim to increase market share, reduce reliance on foreign technology, and capitalize on the growing AI acceleration market.