What’s New in Arm’s Upcoming Armv9 Architecture? Security, AI, and SVE2 Explained

Since Arm first released the Armv8 architecture in October 2011, the company has continuously refined its ISA and architecture for mobile, server, laptop, and desktop markets.

At the recent Vision Day, Arm unveiled the first details of the next‑generation Armv9 architecture, positioning it as the foundation for the next trillion‑chip computing platform.

Armv9 retains AArch64 as the base ISA but adds significant extensions focused on three pillars: security, artificial intelligence, and enhanced vector/DSP capabilities. The new security features are embodied in the Arm Confidential Compute Architecture (CCA), which introduces “realms” – isolated execution environments managed by a lightweight realm manager, reducing the trusted computing base.

The AI pillar is supported by the introduction of SVE2, the successor to NEON, which expands the Scalable Vector Extension (SVE) with variable‑length SIMD instructions ranging from 128 b to 2048 b, enabling a single binary to exploit future wide‑vector pipelines.

Matrix‑multiplication instructions and the expanded SIMD set simplify software development across devices, while Memory Tagging Extensions (MTE), carried over from Armv8.5, continue to mitigate buffer‑overflow and use‑after‑free vulnerabilities.

Arm also outlined its CPU roadmap, highlighting performance gains of up to 2.4× IPC for upcoming X1 and Neoverse V1 designs, and previewing next‑generation mobile cores “Matterhorn” and “Makalu” with an expected 30 % IPC increase.

In the GPU domain, Arm announced future Mali features such as Variable Rate Shading and ray tracing, aiming to bring desktop‑class rendering techniques to mobile platforms.

Overall, Armv9 combines a modest ISA evolution with a comprehensive software‑ecosystem re‑baseline, setting the stage for the next decade of Arm‑based computing.