What You Need to Know About ASIC Chips: Types, Benefits, and Market Outlook

What Is an ASIC Chip?

ASIC (Application Specific Integrated Circuit) is a custom‑designed integrated circuit built from the ground up to meet the specific requirements of a target electronic system, offering optimized performance and efficiency for fixed algorithms. ASIC modules are widely used in AI devices, cryptocurrency miners, printers, military equipment, and other smart terminals.

Hardware Composition

At the material level, ASICs are fabricated from silicon, gallium phosphide, gallium arsenide, or nitride‑based substrates. Physically, an ASIC module integrates external storage, power management units, audio‑video processors, networking IP cores, and other blocks. A single board may host one or several ASICs to satisfy multiple functional needs.

Classification by Customization Level

1. Full‑Custom ASIC

Full‑custom ASICs achieve the highest degree of customization. Designers create bespoke logic units, analog circuits, memory blocks, and mechanical structures, connecting them via mask layers. Design cycles exceed nine weeks per chip, and costs are high, but performance, power consumption, and area efficiency can be up to eight times better than semi‑custom designs. For example, a 24 nm full‑custom ASIC can outperform a 5 nm semi‑custom ASIC in the same process node.

2. Semi‑Custom ASIC

Semi‑custom ASICs combine standard‑cell libraries with custom logic. They are cheaper and more flexible than full‑custom chips. Based on the mix of standard and custom cells, they split into:

Gate‑Array ASICs : include channel, non‑channel, and structured gate arrays.

Channel gate array : transistor positions are fixed; designers place interconnects in predefined blank spaces.

Non‑channel gate array : no blank spaces; routing occurs above the gate array.

Structured gate array : adds embedded blocks to improve routing flexibility while keeping area efficiency low.

Standard‑Cell ASIC : built from selected cells in a standard‑cell library; designers can freely place cells to match algorithmic needs. Fixed blocks such as microcontrollers or microprocessors may also be integrated.

3. Programmable ASIC

Programmable ASICs encompass FPGA and PLD devices. While FPGA is often treated separately, PLD (Programmable Logic Device) is considered a sub‑category here. PLDs consist of a matrix of basic logic units, flip‑flops, and latches, with programmable interconnects that allow limited customization for specific applications.

Classification by Functional Target

ASICs are also grouped by the type of workload they accelerate:

TPU (Tensor Processing Unit) : optimized for machine‑learning workloads; e.g., Google’s 2016 TPU for TensorFlow.

BPU (Brain Processing Unit) : an embedded AI processor architecture proposed by Horizon Robotics.

NPU (Neural Processing Unit) : mimics neurons and synapses at the circuit level, executing deep‑learning instruction sets directly.

Key Advantages of ASICs

Area Efficiency : Eliminating redundant logic reduces chip footprint, allowing more dies per wafer and lowering wafer cost.

Power Efficiency : ASICs consume roughly half the power per unit of compute compared with GPUs (≈0.2 W vs. 0.4 W).

Integration : Highly integrated design yields superior performance for dedicated systems.

Cost Advantage : Average market price is about US $3 per chip; economies of scale can drive prices even lower.

Drawbacks of ASICs

Long design and verification cycles due to high customization, delaying time‑to‑market.

Strong dependence on specific algorithms; rapid AI algorithm evolution can render ASICs obsolete quickly.

High risk of market淘汰 because of the lengthy development timeline.

Representative ASIC Products

Google’s 2016 TPU, embedded in the 2017 AlphaGo hardware and supporting Google Cloud TPU services.

IBM’s 28 nm TrueNorth (second‑generation) released in 2014, targeting real‑time video processing.

Intel’s 2017 Xeon‑series ASIC, capable of operating independently without a host CPU for deep‑learning workloads.

Stanford University’s neuromorphic ASIC, achieving 9,000× speed‑up over conventional PCs and simulating ~1 million neurons and billions of synapses.

Emerging startups applying ASICs to security, assisted driving, consumer appliances, and smart medical devices.

Market Outlook in China

Sales of Chinese ASIC chips continue to grow, driven by:

Edge‑computing demand for dedicated deep‑learning ASICs.

Adoption in mobile communications, AR/VR headsets, tablets, drones, and smart‑home devices.

Rise of graphics‑based deep‑learning processors, where ASICs excel.

Proliferation of AI terminals capable of both training and inference around 2022, creating large deployment opportunities.

Source: "China ASIC Chip Industry Premium Report".