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interconnect

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Architects' Tech Alliance
Architects' Tech Alliance
Apr 2, 2024 · Artificial Intelligence

Evolution and Forecast of Nvidia NVLink, NVLink C2C, and B100/X100 GPU Architectures

The article analyses the historical evolution of Nvidia's NVLink and NVLink C2C interconnect technologies, compares them with PCIe, Ethernet and InfiniBand, and uses these trends to predict future AI‑chip architectures such as the B100 and X100 GPUs, highlighting design trade‑offs and packaging challenges.

AI chipB100GPU architecture
0 likes · 15 min read
Evolution and Forecast of Nvidia NVLink, NVLink C2C, and B100/X100 GPU Architectures
Architects' Tech Alliance
Architects' Tech Alliance
Mar 26, 2024 · Artificial Intelligence

Analysis and Forecast of Nvidia AI Chip Roadmap: From H100 to X100

The article analyzes Nvidia's AI chip evolution, assumes consistent storage‑compute‑interconnect ratios and predictable process scaling, and projects the architectures of H200, B100 and X100, highlighting the limits of chiplet packaging and the critical role of low‑latency, high‑reliability interconnect technologies for future AI compute scaling.

AI chipsChipletGPU architecture
0 likes · 12 min read
Analysis and Forecast of Nvidia AI Chip Roadmap: From H100 to X100
Architects' Tech Alliance
Architects' Tech Alliance
Jul 10, 2023 · Fundamentals

Aligning the PCI‑Express Roadmap with the Cadence of Compute Engines and Networks

The article argues that PCI‑Express specifications, controllers, and switches must adopt a coordinated two‑year release cadence that matches CPU, GPU, and accelerator roadmaps, urging the PCI‑SIG to accelerate to PCI‑Express 7.0 to meet the bandwidth demands of modern data‑center and AI workloads.

GPUHardware ArchitecturePCI Express
0 likes · 13 min read
Aligning the PCI‑Express Roadmap with the Cadence of Compute Engines and Networks
Architects' Tech Alliance
Architects' Tech Alliance
Jul 16, 2022 · Fundamentals

Challenges and Future Directions for Computing Systems: Logic, Memory, and Interconnect

The article analyzes the exponential growth of digital data and the resulting limits of traditional scaling in processors, memory, and interconnects, then surveys emerging technologies such as 3D stacking, new non‑volatile memories, PAM‑4 signaling, and optical links, highlighting opportunities for hardware designers to sustain computing performance.

Hardwarecomputingdata explosion
0 likes · 28 min read
Challenges and Future Directions for Computing Systems: Logic, Memory, and Interconnect
Alibaba Cloud Infrastructure
Alibaba Cloud Infrastructure
Jul 5, 2022 · Fundamentals

High‑Performance Chiplet and Interconnect Architectures: Insights from the HiPChips Workshop at ISCA 2022

The HiPChips workshop at ISCA 2022 gathered leading academia and industry experts to discuss the motivations, recent research breakthroughs, technical challenges, and ecosystem efforts surrounding high‑performance chiplet and interconnect architectures for future computing systems.

ChipletComputer ArchitectureHigh Performance Computing
0 likes · 10 min read
High‑Performance Chiplet and Interconnect Architectures: Insights from the HiPChips Workshop at ISCA 2022
Architects' Tech Alliance
Architects' Tech Alliance
Nov 21, 2021 · Cloud Computing

Future Computing Trends: Cloud, AI, Heterogeneous Architecture, and Emerging Interconnect Technologies

The article examines the evolution of computing from performance‑driven Moore's Law to comprehensive innovation, highlighting cloud adoption, heterogeneous accelerators, AI‑driven operations, multi‑cloud and edge strategies, memory‑centric designs, and next‑generation interconnects that together shape the next decade of digital infrastructure.

Artificial IntelligenceMemory Technologycloud computing
0 likes · 17 min read
Future Computing Trends: Cloud, AI, Heterogeneous Architecture, and Emerging Interconnect Technologies
Architects' Tech Alliance
Architects' Tech Alliance
Nov 18, 2021 · Fundamentals

Challenges and Future Directions in Computing System Design: Logic, Memory, and Interconnect

The article reviews the accelerating data explosion and its impact on computing hardware, analyzes the limits of traditional scaling in logic, memory, and interconnect, and proposes specialized ICs, design reuse, 3‑D integration, new memory technologies, and optical interconnects as viable paths to sustain performance growth.

Memory Technologycomputinghardware design
0 likes · 30 min read
Challenges and Future Directions in Computing System Design: Logic, Memory, and Interconnect