This guide explains when CPU context switches happen, how to monitor them with vmstat and pidstat, interprets key metrics such as cswch and nvcswch, and provides step‑by‑step analysis techniques for identifying and troubleshooting CPU performance issues on Linux systems.
This article presents eight high‑frequency embedded‑system interview questions, explains the underlying concepts such as boot process, interrupt handling, stack overflow detection, struct alignment, bit‑banding, dynamic memory risks, volatile usage, and provides concise C code examples and best‑practice answers to help candidates succeed in technical interviews.
This article explains the complete Linux interrupt management process, covering the basics of hardware and software interrupts, the role of programmable interrupt controllers, the CPU's response workflow, top‑half and bottom‑half handling, registration techniques, performance optimizations, and debugging tools, all illustrated with concrete examples and code.
This article explains the complete Linux interrupt mechanism—from hardware signal generation, through the programmable interrupt controller and CPU response, to the split top‑half and bottom‑half handling and driver registration—providing developers and operators with a clear understanding of how microsecond‑level hardware events are processed efficiently.
This article explains the Linux network interface card packet reception flow, how to identify and interpret RX errors, dropped packets and overruns, and provides practical commands and tuning methods such as adjusting ring buffers, IRQ affinity, RSS/RPS, and netdev_max_backlog to resolve packet loss.
This article explains the role of the interrupt system in ARM‑based Linux platforms, covering hardware modes, vector tables, exception handling, GIC architecture, and kernel integration, and provides detailed code examples and optimization techniques for developers working on embedded and high‑performance systems.
This article explains the concept of real‑time operating systems, distinguishes soft and hard real‑time, and walks through Linux kernel factors such as clock tick, interrupt handling, scheduling classes, run‑bandwidth limits, and DPDK polling, providing concrete examples and practical tuning steps.
The article explains how 1960s batch systems suffered from CPU waste due to polling I/O devices, how IBM 704’s overflow flag inspired automatic error handling, and how the concept evolved into hardware interrupts with a concrete design, interrupt types, and vector table implementation.
This article explains the concept of interrupt top‑half and bottom‑half processing, why splitting an ISR improves system efficiency, and introduces common Linux mechanisms such as soft interrupts, tasklets, workqueues, timers, and delayed work for handling deferred tasks.
The article explains how early batch-processing systems relied on inefficient polling of slow I/O devices, describes the inspiration from IBM 704's overflow flag, and details the invention and implementation of hardware and software interrupts, including interrupt types, vector tables, and handler functions, to enable efficient CPU‑device interaction.
This article explores the Linux kernel's interrupt management architecture, detailing how hardware interrupt IDs are mapped to software IRQ numbers through the irq_domain structure, GIC controller design, and various mapping strategies such as linear, radix‑tree, and no‑map approaches.
This article explains the Linux network interface card packet‑reception process, how to interpret RX error counters, the difference between dropped and overrun packets, and provides practical commands for diagnosing and tuning ring buffers, interrupts, RSS, RPS, and netdev_max_backlog to reduce packet loss.
This comprehensive Q&A explains Linux system composition, kernel placement, core subsystems, address translation, paging structures, process concepts, scheduling algorithms, interrupt handling, system calls, synchronization, deadlock avoidance, and the virtual file system, providing a solid foundation for operating‑system fundamentals.
This article explains the ARM hardware interrupt flow, the Linux kernel's handling of IRQ and FIQ, the construction of exception vector tables, the role of asmlinkage, interrupt registration, shared interrupt models, and the specific implementation for the S3C2410 platform.
During a computer freeze, the CPU isn’t simply idle; it may be trapped in a high‑priority interrupt handler or deadlocked kernel code, and the operating system’s scheduling and interrupt priorities determine whether the processor can be reclaimed, explaining why a simple infinite loop rarely causes a crash.
This article explains why computers freeze, describing how the CPU can become stuck in software loops, the crucial role of interrupts and their priorities, and how kernel‑level deadlocks can render a system unresponsive despite the CPU still running.
This article explains the fundamentals of Linux interrupt handling, covering hardware and software interrupts, the IRQ processing flow, maskable vs non‑maskable interrupts, and the three deferred execution mechanisms—softirq, tasklet, and workqueue—along with code examples and performance considerations.
This article explains the fundamentals of Linux interrupt handling, covering the distinction between hardware and software interrupts, the processing flow of hard IRQs, maskable versus non‑maskable interrupts, the need for deferred execution, and a deep dive into softirqs, tasklets, and workqueues with code examples and performance considerations.
This article explains the fundamentals of Linux interrupt handling, covering hardware and software interrupt types, the IRQ processing flow, maskable versus non‑maskable interrupts, the need for deferred execution, and detailed mechanisms of softirqs, tasklets, and workqueues with practical code examples.
The article explains why computers appear to freeze by describing how the CPU, pre‑emptive multitasking, interrupt handling, and kernel‑level deadlocks interact, showing that simple infinite loops rarely cause a crash while kernel bugs can make the system unresponsive.
This article explains how a CPU handles interrupts using mechanisms like the programmable interrupt controller (PIC), advanced APIC, interrupt vectors, IDT, and how interrupt affinity and CPU affinity can be configured to balance load across multiple cores, illustrating both synchronous exceptions and asynchronous interrupts.
This article explains how CPUs receive interrupt numbers through hardware, exceptions, or the INT instruction, describes the structure and purpose of the Interrupt Descriptor Table, and details the stack operations and control‑flow steps the processor performs to handle and return from an interrupt.
This article walks through the complete Linux kernel path for sending a network packet, covering the send() system call, TCP processing, IP routing, queueing, driver interaction, DMA mapping, and the role of hard and soft interrupts, while answering common performance questions.
This article explains the layered architecture of the Linux network stack, maps the TCP/IP model to Linux implementation, and details how hardware and soft interrupts, ksoftirqd threads, and NAPI cooperate with driver initialization to process packet reception and transmission.
This article explains the fundamentals of x86 interrupt handling, covering the distinction between interrupt vectors and descriptors, classification of internal and external interrupts, the role of the 8259A PIC, how interrupt numbers are assigned, and the mechanisms for saving and restoring CPU state during an interrupt.
This article provides a detailed, step‑by‑step walkthrough of the Linux kernel’s packet‑receiving path, covering NIC DMA, hardware and soft interrupts, ksoftirqd threads, NAPI polling, protocol‑stack registration, IP/UDP processing, and the final recvfrom system call that delivers data to user space.
This article walks through the complete Linux kernel path a network packet follows—from the NIC’s DMA and hardware interrupt, through soft‑interrupt handling, NAPI polling, protocol‑stack registration, IP and UDP processing, all the way to the user‑space recvfrom system call—revealing the many hidden steps that make packet reception possible.
This article explains how operating systems manage diverse I/O devices through device controllers, registers, drivers, DMA, and Linux’s generic block layer, and walks through the complete sequence that occurs—from a keyboard press to the character appearing on the screen.
This article explains the CPU's interrupt mechanism, describing how hardware devices trigger interrupts, the role of the 8259A programmable interrupt controller, the evolution to APIC with I/O and Local APICs, and how interrupt affinity can be configured to improve multi‑core performance.
This article explains the CPU interrupt mechanism, describing how hardware devices generate interrupt signals, how the legacy 8259A PIC and modern APIC manage and prioritize those interrupts, and how interrupt affinity can be configured to improve multi‑core performance.
This article explains what an IDT is, how it is initialized, the structure of interrupt descriptor entries and gates, the implementation of traditional system calls via int 0x80, and the setup and handling of hardware interrupts in the Linux kernel.
This article explains what CPU interrupts are, distinguishes synchronous and asynchronous types, describes the role of APIC controllers, and details the step‑by‑step initialization of the Interrupt Descriptor Table and related interrupt handling mechanisms in the Linux kernel.
The article investigates massive packet loss in Meituan‑Dianping's Redis service despite 10 Gbps NIC upgrades, traces the issue to kernel receive‑buffer drops and single‑CPU interrupt handling, and presents a step‑by‑step optimization using backlog tuning, CPU and Redis affinity, and NUMA‑aware placement to eliminate drops and improve latency.
This comprehensive guide covers Linux fundamentals, explaining GNU's role, system components, kernel subsystems, memory addressing, process management, interrupt handling, system calls, synchronization mechanisms, file systems, and device drivers, providing clear answers to common questions for learners and developers.
This article explains Linux interrupt handling mechanisms, covering the basic vector‑table approach, the concept of bottom‑half processing, and the evolution from simple interrupt routines to softirqs, tasklets, and workqueues, while offering practical guidance on when to use each technique.
This article explains why a Janus gateway’s QPS stalled under large payloads, how enabling NIC multi‑queue and binding interrupts to specific CPUs (IRQ affinity) resolves the bottleneck, and provides practical commands and a script for Linux network interrupt tuning.
This article explains the distinction between hard IRQ and soft IRQ in the Linux x86 32‑bit kernel, detailing how preempt_count tracks interrupt context, how do_IRQ, irq_enter, and irq_exit manage the transition, and how __do_softirq processes pending softirqs with code examples and diagrams.
