Evolution and Future Trends of Automotive Chips for Autonomous Driving

Based on the third report of the autonomous‑driving series, this article reviews the development history of automotive chips and explores future directions, providing a download link for the full report series.

1. Development Trend of Automotive Chips Historically, automotive electronic chips were distributed ECUs linked to individual sensors. With increasing sensor count and vehicle intelligence, distributed architectures gave way to centralized DCU and MDC architectures.

Artificial‑intelligence advances have driven the need for massive parallel processing of video and radar data, making GPUs replace CPUs for many tasks; GPU + FPGA solutions now dominate training and inference workloads.

Looking ahead, the addition of lidar point‑cloud data will further strain GPUs, and ASICs—offering superior performance, lower power, and lower volume‑production cost—are expected to become mainstream for autonomous‑driving processors.

2. Past: CPU‑Centric Automotive Chips ECUs consist of a CPU, memory, I/O, ADC, and other ASICs. The CPU receives sensor signals, processes data, and drives actuators through peripheral circuits. As sensor numbers grew, the one‑to‑one ECU model became inefficient, prompting a shift to centralized DCU/MDC architectures.

3. Present: GPU‑Centric Intelligent Driving Chips AI‑driven vehicle intelligence requires handling unstructured data (images, video) and multi‑sensor fusion, which CPUs cannot efficiently process. GPUs provide hundreds of simple cores for parallel computation, delivering higher performance‑per‑watt for tasks such as image recognition and sensor fusion. Current automotive GPUs must meet stringent automotive requirements, including power efficiency, ecosystem support, and a minimum 10,000‑hour lifetime.

Both training (cloud) and inference (edge) stages rely heavily on parallel computation; thus, GPU + FPGA remains the dominant solution for today’s assisted‑driving chips.

4. GPU‑Related Companies NVIDIA leads the market with GPU‑based Drive PX platforms (PX2, Xavier) that integrate multiple GPUs, cameras, and radars for various autonomy levels. NVIDIA’s solutions are widely adopted by Tesla, Audi, ZF, and other OEMs. Mobileye focuses on vision processing, while other vendors such as Cambricon, Horizon, and Xilinx provide FPGA or ASIC alternatives.

5. Future: ASIC‑Centric Autonomous‑Driving Chips ASICs offer fixed‑function, highly optimized designs with the best performance‑per‑watt and lower volume‑production cost compared to GPUs and FPGAs. While ASICs lack the flexibility of programmable devices, they are expected to dominate once autonomous‑driving algorithms stabilize.

Energy‑efficiency comparisons show ASIC > FPGA > GPU > CPU. ASICs’ close‑to‑silicon design makes them the most suitable for large‑scale production of autonomous‑driving processors.

6. Related Companies and Solutions Intel (including Mobileye) provides ADAS processors and FPGA‑based solutions; Cambricon offers AI chips (1M, MLU100) with high TOPS/W efficiency; Horizon’s Matrix series targets L3/L4 autonomy; Google’s TPU delivers 15‑30× performance over CPUs/GPUs for cloud training; Xilinx supplies FPGA platforms for central‑controller designs.

Overall, the article concludes that ASICs are likely to become the core of future autonomous‑driving chips, though the rapid evolution of algorithms means premature ASIC adoption may not always be optimal.