Tagged articles
20 articles
Page 1 of 1
Machine Learning Algorithms & Natural Language Processing
Machine Learning Algorithms & Natural Language Processing
Mar 3, 2026 · Artificial Intelligence

Can ROM‑Based LLM Accelerators Reach 20,000 tokens/s and End the GPU Era?

The article analyzes the ROMA and TOM architectures that embed large‑language‑model weights in on‑chip ROM + SRAM, achieving up to 20,000 tokens/s inference speed, compares them with GPU and Taalas solutions, and discusses their impact on edge AI, embodied intelligence, extreme environments, and privacy.

AI acceleratorEdge ComputingLLM
0 likes · 11 min read
Can ROM‑Based LLM Accelerators Reach 20,000 tokens/s and End the GPU Era?
21CTO
21CTO
Oct 7, 2025 · Artificial Intelligence

Why Microsoft Is Shifting AI Workloads from GPUs to Its Own Maia Accelerators

Microsoft, after buying massive GPU inventories from Nvidia and AMD, is accelerating its move to custom AI accelerators like Maia to improve cost‑performance in its data centers, even though its first‑generation chips still lag behind industry leaders.

AI acceleratorGPUMaia
0 likes · 5 min read
Why Microsoft Is Shifting AI Workloads from GPUs to Its Own Maia Accelerators
Data Party THU
Data Party THU
Sep 6, 2025 · Artificial Intelligence

How Cornell’s Microwave Neural Network Enables GHz‑Speed AI with Sub‑200 mW Power

The article presents Cornell’s Microwave Neural Network (MNN), a CMOS‑based integrated circuit that processes ultra‑high‑speed data and wireless signals using analog microwave physics, achieving gigahertz‑band AI computation with less than 200 mW power consumption and demonstrating high accuracy across classification, radar, and modulation tasks.

AI acceleratorCMOSHigh Bandwidth
0 likes · 17 min read
How Cornell’s Microwave Neural Network Enables GHz‑Speed AI with Sub‑200 mW Power
Architects' Tech Alliance
Architects' Tech Alliance
Aug 23, 2025 · Artificial Intelligence

How Huawei’s Ascend Architecture Redefines AI Acceleration

This article examines Huawei's Ascend AI accelerator architecture, detailing its heterogeneous compute units, memory hierarchy, task scheduling, programming model, and chip variants, while also discussing future challenges and the ecosystem needed for widespread AI deployment.

AI acceleratorAI hardwareDaVinci architecture
0 likes · 14 min read
How Huawei’s Ascend Architecture Redefines AI Acceleration
Architects' Tech Alliance
Architects' Tech Alliance
Jun 13, 2025 · Artificial Intelligence

How Huawei’s CloudMatrix 384 Challenges Nvidia’s AI Supercomputers

Huawei’s CloudMatrix 384, built from 384 Ascend 910C chips and a multi‑to‑multi topology, delivers up to 300 PFLOP BF16 performance—nearly twice that of Nvidia’s GB200 NVL72—while exposing supply‑chain dependencies on foreign fabs, higher power consumption, and a rapid push to scale China’s domestic semiconductor capabilities.

AI acceleratorAscend 910CCloudMatrix 384
0 likes · 12 min read
How Huawei’s CloudMatrix 384 Challenges Nvidia’s AI Supercomputers
Architects' Tech Alliance
Architects' Tech Alliance
May 24, 2025 · Industry Insights

What Sets Xiaomi’s New Xuanjie O1 SoC Apart? Deep Dive into Specs and Competition

The article provides a comprehensive technical analysis of Xiaomi’s newly launched Xuanjie O1 mobile SoC, covering its 3nm N3E process, ten‑core CPU layout, Arm Immortalis‑G925 GPU, 6‑core NPU, memory and storage features, benchmark results, and detailed comparisons with Snapdragon, MediaTek and Apple flagship chips.

AI acceleratorCPU architectureIndustry analysis
0 likes · 12 min read
What Sets Xiaomi’s New Xuanjie O1 SoC Apart? Deep Dive into Specs and Competition
Architects' Tech Alliance
Architects' Tech Alliance
May 21, 2025 · Artificial Intelligence

Inside Huawei Ascend 910: Architecture, Performance, and Future Roadmap

The article provides a detailed technical analysis of Huawei's Ascend 910 AI processor, covering its Da Vinci architecture, hardware specifications, benchmark results, software ecosystem, application scenarios, and product roadmap, while also clarifying key terminology for readers.

AI acceleratorAscend910DaVinci architecture
0 likes · 12 min read
Inside Huawei Ascend 910: Architecture, Performance, and Future Roadmap
Architects' Tech Alliance
Architects' Tech Alliance
May 18, 2025 · Industry Insights

How Alibaba’s Chip Innovations Are Shaping AI, Cloud, and Edge Computing

This article provides a comprehensive technical analysis of Alibaba’s chip portfolio—including the XuanTie RISC‑V processors, Hanguang 800 AI accelerator, Yitian 710 server silicon, and a novel compute‑in‑memory architecture—detailing their specifications, performance highlights, roadmap plans, and real‑world applications in cloud, AI, and IoT ecosystems.

AI acceleratorAlibabaCompute-in-Memory
0 likes · 16 min read
How Alibaba’s Chip Innovations Are Shaping AI, Cloud, and Edge Computing
Architects' Tech Alliance
Architects' Tech Alliance
Apr 17, 2025 · Artificial Intelligence

Inside Huawei’s Ascend AI Processor: Architecture, Performance, and Design Secrets

This article provides a detailed technical overview of Huawei's Ascend AI processors, covering the Da Vinci architecture, core components such as AI Core and DVPP, the chiplet‑based designs of the Ascend 910 and 310 models, and the specific optimizations for high‑performance convolution and cloud‑edge workloads.

AI CoreAI acceleratorAscend AI
0 likes · 11 min read
Inside Huawei’s Ascend AI Processor: Architecture, Performance, and Design Secrets
Architects' Tech Alliance
Architects' Tech Alliance
Apr 17, 2025 · Artificial Intelligence

Can Huawei’s Ascend 910C Challenge Nvidia’s H100? A Deep Dive into Architecture, Performance, and Strategy

This article dissects Huawei's Ascend 910C AI accelerator, examining its dual‑chip architecture, cost‑focused packaging, performance metrics that reach roughly 80% of Nvidia's H100, speculative supply‑chain origins, and the broader strategic implications for China's position in the global AI chip race.

AI acceleratorAscend 910CHuawei
0 likes · 19 min read
Can Huawei’s Ascend 910C Challenge Nvidia’s H100? A Deep Dive into Architecture, Performance, and Strategy
Architects' Tech Alliance
Architects' Tech Alliance
Jan 22, 2025 · Artificial Intelligence

Inside Huawei Ascend: How Its Heterogeneous Architecture Powers Modern AI Workloads

This article provides an in‑depth technical analysis of Huawei’s Ascend AI accelerator architecture, detailing its heterogeneous compute units, memory hierarchy, task scheduling, programming model, compiler optimizations, and the capabilities of the Ascend 310 and 910 chips, while also discussing future challenges and market competition.

AI acceleratorAI hardwareHBM
0 likes · 14 min read
Inside Huawei Ascend: How Its Heterogeneous Architecture Powers Modern AI Workloads
Architects' Tech Alliance
Architects' Tech Alliance
Oct 19, 2024 · Industry Insights

What Is an NPU and Why It’s Shaping the Future of AI PCs

The article explains what Neural Processing Units (NPUs) are, how they differ from CPUs and GPUs, their parallel architecture, the workloads they accelerate, their role in edge AI and AI‑enabled PCs, and why industry analysts expect NPU‑enabled devices to dominate the market by 2026.

AI PCAI acceleratorEdge Computing
0 likes · 8 min read
What Is an NPU and Why It’s Shaping the Future of AI PCs
Architects' Tech Alliance
Architects' Tech Alliance
Aug 27, 2024 · Artificial Intelligence

Why Liquid‑Cooled Cold‑Plate Designs Are Critical for PCIe AI Accelerators

This whitepaper explains how liquid‑cooled cold‑plate technology addresses the high power density of PCIe‑based AI accelerator cards, outlines standardized design requirements, and provides detailed guidelines for thermal, mechanical, and reliability aspects to improve data‑center PUE and enable greener AI servers.

AI acceleratorPCIecold plate
0 likes · 11 min read
Why Liquid‑Cooled Cold‑Plate Designs Are Critical for PCIe AI Accelerators
Baidu Tech Salon
Baidu Tech Salon
Jun 13, 2022 · Artificial Intelligence

Kunlun Core AI Chips: Making Computing Smarter

The 2022 Beijing Zhiyuan Conference report by Kunlun Core’s chip R&D director outlines AI chip market opportunities and challenges, describes the company’s shift from FPGA clusters to a programmable XPU‑R architecture with 7nm, 256 TOPS INT8 performance, GDDR6 memory and PCIe 4.0, and details current deployments and plans for third‑ and fourth‑generation chips.

AI ChipAI acceleratorChip Design
0 likes · 12 min read
Kunlun Core AI Chips: Making Computing Smarter
Architects' Tech Alliance
Architects' Tech Alliance
Feb 13, 2022 · Artificial Intelligence

Overview of ASIC Chips: Types, Characteristics, and Applications

This article provides a comprehensive overview of ASIC chips, detailing their classifications—including full‑custom, semi‑custom, and programmable ASICs—along with their structural components, advantages, disadvantages, major product examples, and emerging market trends in AI and other smart devices.

AI acceleratorASIC
0 likes · 10 min read
Overview of ASIC Chips: Types, Characteristics, and Applications
Architects' Tech Alliance
Architects' Tech Alliance
Jan 6, 2021 · Fundamentals

Overview of ASIC Chip Types, Characteristics, and Applications

This article provides a comprehensive overview of ASIC chips, detailing their definition, material composition, classification by customization level and function, key advantages and disadvantages, and notable product examples across AI, security, and consumer electronics domains.

AI acceleratorASICFPGA
0 likes · 8 min read
Overview of ASIC Chip Types, Characteristics, and Applications
Architects' Tech Alliance
Architects' Tech Alliance
Dec 30, 2020 · Artificial Intelligence

Understanding GPUs, AI Accelerators, and Market Trends

The article explains GPU evolution, its integration with CPUs, interconnect technologies like PCIe and NVLink, market shares of NVIDIA, AMD and Intel, AI accelerator types (GPU, FPGA, ASIC), and the roles of training and inference in cloud AI, while also promoting a paid 182‑page PPT resource.

AI acceleratorGPUHPC
0 likes · 7 min read
Understanding GPUs, AI Accelerators, and Market Trends
Alibaba Cloud Infrastructure
Alibaba Cloud Infrastructure
Aug 29, 2018 · Artificial Intelligence

Alibaba's FPGA-Based Ultra‑Low Latency, High‑Throughput Machine Learning Processor

Alibaba unveiled an FPGA‑designed machine‑learning accelerator that achieves sub‑millisecond inference latency and thousands of frames‑per‑second throughput, demonstrating how integrated hardware‑software optimizations can deliver real‑time AI performance surpassing conventional GPU and ASIC solutions.

AI acceleratorFPGAHigh Throughput
0 likes · 5 min read
Alibaba's FPGA-Based Ultra‑Low Latency, High‑Throughput Machine Learning Processor