Artificial Intelligence 12 min read

NVLink Fusion: NVIDIA’s High‑Bandwidth Interconnect for Heterogeneous AI Computing

NVLink Fusion, unveiled at Computex 2025, extends NVIDIA’s NVLink technology to enable high‑bandwidth, low‑latency connections between CPUs and GPUs or third‑party accelerators, offering up to 900 GB/s bandwidth, flexible heterogeneous configurations, ecosystem expansion, performance gains for AI training and inference, and potential cost reductions.

Architects' Tech Alliance
Architects' Tech Alliance
Architects' Tech Alliance
NVLink Fusion: NVIDIA’s High‑Bandwidth Interconnect for Heterogeneous AI Computing

At the 2025 Computex in Taipei, NVIDIA announced NVLink Fusion, an extension of its NVLink interconnect that enables chip‑to‑chip communication between CPUs and NVIDIA GPUs or third‑party accelerators.

Core Architecture – NVLink Fusion builds on the proven NVLink‑C2C technology and uses advanced packaging to achieve up to 900 GB/s bidirectional bandwidth, a 25‑fold efficiency improvement over PCIe Gen 5 and a 90‑fold area efficiency gain.

Technical Principle – By exposing an open hardware interface, NVLink Fusion allows third‑party CPUs (e.g., Grace, future Vera) to be linked with NVIDIA AI chips, creating a seamless heterogeneous computing environment.

Configuration Options – (1) Custom CPU‑to‑GPU links delivering ~128 GB/s (≈14× PCIe 5.0) for faster data exchange in AI training; (2) NVIDIA CPUs connecting to non‑NVIDIA accelerators via integrated NVLink IP, enabling mixed‑vendor “super‑chip” designs.

Ecosystem – Early adopters such as MediaTek, Marvell, Alchip, Astera Labs, Synopsys, Cadence, Fujitsu and Qualcomm are integrating NVLink Fusion into their products, expanding the ecosystem beyond NVIDIA‑only solutions.

Advantages – • Dramatically higher data‑transfer rates and lower latency (e.g., NVLink 3.0 reduces all‑reduce latency from 11 ms to 0.6 ms for 70B models); • Flexible heterogeneous computing that lets data centers mix CPUs, GPUs and custom ASICs to match workload requirements; • Scalable architecture supporting hundreds of GPUs and ASICs for large‑scale AI platforms; • Lower total cost of ownership through improved efficiency and reduced upgrade cycles.

NVLink Fusion also breaks NVIDIA’s previous closed‑loop model, allowing non‑NVIDIA CPUs and accelerators to interoperate with NVIDIA GPUs, thereby fostering an open AI ecosystem and positioning NVIDIA to capture a larger share of the ASIC‑driven data‑center market.

Overall, the technology aims to accelerate AI model training and inference, drive data‑center architecture transformation, and maintain NVIDIA’s leadership in the rapidly evolving AI hardware landscape.

AICPUGPUdata centerheterogeneous computingNVLinkHigh‑Bandwidth Interconnect
Architects' Tech Alliance
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