Overview of Modern Processor Instruction Set Architectures: x86, ARM, and RISC‑V

Modern processors mainly use two instruction set architectures (ISA): the complex‑instruction‑set (CISC) x86 family and the reduced‑instruction‑set (RISC) families such as ARM, MIPS, and RISC‑V.

CISC aims to execute complex tasks in a single instruction, offering high performance at the cost of larger silicon area and higher power consumption, while RISC breaks tasks into simpler instructions, reducing power and area but often requiring more cycles.

The x86 family includes x86‑32 (Intel), x86‑64 (Intel), and AMD64 (AMD). RISC families include ARM, MIPS, Alpha, and RISC‑V. In China’s “information‑technology innovation” market, four technology paths (x86, ARM, MIPS, Alpha) and six major vendors (Zhaoxin, HaiGuang, Kunpeng, FeiTeng, Loongson, ShenWei) have emerged.

1. x86 ISA – Designed for binary compatibility across generations, the x86 set has grown from fewer than 200 instructions to over 1,600 today. Its “strong” instructions can perform complex operations in a single clock cycle, simplifying compiler design but requiring many transistors and higher power.

Advantages include broad ecosystem support, strong backward compatibility, and high single‑core performance; disadvantages are design complexity, large transistor count, and higher power consumption.

2. ARM ISA – Early RISC research showed that about 80% of instruction usage comes from only 20% of the instruction set. ARM adopts three core profiles: Cortex‑A (high‑performance), Cortex‑R (real‑time), and Cortex‑M (embedded). Compared with x86, ARM removes many redundant instructions, resulting in simpler decoders, lower area, and lower power, but its “weak” instructions often require multiple cycles, increasing compiler and assembly complexity.

3. RISC‑V ISA – Originating from academic RISC research, RISC‑V is an open, royalty‑free ISA that has attracted significant industry interest. Since the early 2010s it has seen rapid development in China, with the establishment of the China RISC‑V Industry Alliance (2018), the Open Instruction Ecosystem (2018), and notable product releases such as Alibaba’s Xuantie 910 and Zhaoxin’s 32‑bit MCU. RISC‑V is now used in IoT devices and is expanding into servers and PCs.

4. ISA Summary – The choice between CISC and RISC depends on application requirements: CISC offers high single‑instruction capability and legacy software support, while RISC provides simpler hardware, lower power, and greater flexibility for customization. The current ecosystem includes dominant closed x86 architectures, open ARM architectures with licensing fees, and fully open RISC‑V architectures.

References and further reading links are provided throughout the article.