This article explains what servers are, compares them with personal computers, outlines their physical classifications, architectural types, rack unit measurements, front and rear panel features, internal components—including RAID cards—and details key parameters such as brand, model, serial number, asset ID, and configuration.
This article explains the essential differences between servers and PCs, outlines server classifications by appearance and architecture, describes rack unit measurements, front and rear panel features, internal components such as RAID cards, and key parameters like brand, model, SN and asset numbers.
This article explains how compilers generate load/store instructions, why modern CPUs rely on multi‑level caches instead of direct memory access, the impact of program locality, cache write policies, replacement strategies, and the challenges of cache coherence in multicore systems.
This article compares the major CPU instruction set architectures—x86, ARM, and RISC‑V—detailing their design philosophies, evolution, strengths, and weaknesses, while also summarizing recent updates in CPU, GPU, memory, and storage technologies and highlighting the trade‑offs between CISC and RISC approaches.
The article provides a detailed technical overview of Huawei's Kunpeng 920 processor, describing its ARM‑based RISC architecture, chip organization, core and cluster layout, security features, IMU management, and the various subsystems such as IO, interrupt, network, SAS, and PCIe.
From a rapid BBC Micro prototype in the early 1980s to the 1985 launch of the Acorn RISC Machine, ARM evolved into a low‑power, licensed CPU core that powered devices from the Newton to today’s iPhone, ultimately becoming the world’s most ubiquitous processor architecture.
This article provides a comprehensive overview of contemporary processor instruction set architectures, comparing CISC‑based x86 with RISC‑based ARM and RISC‑V, discussing their design philosophies, historical evolution, advantages, disadvantages, and the current landscape of domestic and international CPU development.
This article provides a comprehensive overview of modern processor instruction set architectures, comparing CISC‑based x86 with RISC‑based ARM and RISC‑V, discussing their historical development, design philosophies, advantages, disadvantages, and current market adoption in both domestic and global contexts.
Although both ARM and x86 processors aim to balance transistor count, program complexity, speed, power consumption, and cost, their fundamentally different architectures—RISC versus CISC—make them non‑interchangeable, leading to distinct trade‑offs in performance, energy efficiency, and application suitability across devices from smartphones to supercomputers.
The article explains the fundamental differences between ARM and x86 CPUs, compares RISC and CISC instruction set philosophies, discusses how each architecture balances transistor count, performance, power consumption and cost, and highlights why ARM dominates low‑power devices while x86 remains prevalent in high‑performance computers.
The article provides a detailed technical overview of Huawei's Kunpeng 920 processor, describing its ARM‑based RISC architecture, chip organization, core and cluster hierarchy, security features, and the various compute, I/O, interrupt, network, SAS, and PCIe subsystems integrated on the SoC.
The article provides a comprehensive overview of China’s domestic CPU ecosystem, explaining the role of CPUs as the digital foundation, comparing CISC and RISC instruction sets, and detailing the product lines and strategies of major manufacturers such as Huawei Kunpeng, HaiGuang, Feiteng, and Loongson, while concluding with market trends and competitive analysis.
The article provides a detailed technical overview of Huawei's Kunpeng 920 processor, describing its ARM‑based RISC architecture, chip organization, core and cache hierarchy, security features, IMU management, and the design of its I/O, interrupt, network, SAS, and PCIe subsystems.
This article compares the dominant X86 and ARM CPU architectures, explaining their performance versus power trade‑offs, CISC versus RISC designs, typical application domains, and the recent surge of ARM‑based servers driven by cloud, HPC and edge computing demands.
The article explains how X86 (CISC) and ARM (RISC) CPU architectures differ in performance goals, power consumption, application domains, instruction set complexity, and market trends, highlighting their respective strengths in servers, PCs, mobile devices, and emerging data‑center workloads.
This article provides a comprehensive analysis of CPU technology, covering basic concepts, classification by instruction set and application, major architectures such as x86, ARM, RISC‑V, and POWER, and examines the upstream and downstream supply chain dynamics shaping the worldwide CPU industry.
Huawei’s Kunpeng processor adopts the ARM RISC architecture, contrasting with traditional CISC CPUs from Intel and AMD, and the article explains how RISC’s simplified, fixed-length instruction set improves performance, reduces hardware complexity, and aligns with modern computing demands.
The article explains how Huawei's Kunpeng processor, built on the Arm RISC architecture, overcomes the complexity and inefficiency of traditional CISC CPUs by using a simplified instruction set, fixed‑length commands, and better power‑performance balance, highlighting its technical advantages and industry relevance.
The article explains how mobile processors prioritize low power, heat, and voltage while improving performance, compares RISC and CISC architectures, discusses the X86‑ARM rivalry, and outlines the rise of heterogeneous System‑on‑Chip designs and their expanding applications across consumer electronics.
The article introduces LoongArch, Loongson's self‑defined RISC instruction set architecture, detailing its evaluation approval, instruction count, format extensions, binary translation compatibility with MIPS, x86, ARM and RISC‑V, ecosystem plans, IP core updates, and the company’s strategy to build a domestic CPU ecosystem.
This article chronicles the development of DEC's Alpha processor—from its roots in the pioneering DEC company and the VAX era, through its groundbreaking RISC design and industry impact, to its eventual decline and lasting influence on modern CPU architectures.
This article explains the fundamental differences between CISC and RISC processor designs, outlines their respective advantages and drawbacks, and compares three major CPU architectures—x86, ARM, and MIPS—highlighting their histories, features, and typical application domains.
The article provides a detailed comparison between ARM's RISC-based processors and Intel's x86 CISC architecture, covering design philosophy, performance, power consumption, expansion capabilities, operating system compatibility, software development tools, and cost considerations for various terminal applications.
This article explains the fundamental differences between RISC and CISC architectures, reviews the historical development and technical characteristics of processors such as MIPS, ARM, and x86, and discusses why China’s Loongson chips favor the MIPS instruction set over alternatives.
The article provides a comprehensive overview of RISC principles and compares major processor families—including ARM, x86, Atom, MIPS, and PowerPC—detailing their architectures, performance characteristics, market adoption, and licensing models while also mentioning related DSP technologies and reference resources.
This article provides a detailed comparison between ARM's RISC-based processors and Intel's CISC‑based x86 CPUs, covering design philosophies, performance, power consumption, expansion capabilities, operating‑system compatibility, software development tools, cost factors, and suitable application scenarios.
This article provides a comprehensive overview of RISC architecture and its major implementations—including ARM, x86/Atom, MIPS, and PowerPC—detailing their design principles, performance characteristics, market adoption, and relevance to embedded and mobile systems.
This article chronicles the development, competition, and strategic shifts of the x86 and ARM processor ecosystems from their early days through recent innovations, highlighting key architectural decisions, market dynamics, and the evolving role of software abstraction layers in shaping the semiconductor landscape.
This article chronicles the origins of ARM from its 1978 Cambridge roots, the development of RISC architecture, the strategic shift to IP licensing, and how ARM's low‑power designs propelled it to dominate mobile, IoT, and computing ecosystems worldwide.
This article explains the principles of Reduced Instruction Set Computing (RISC), compares its performance advantages over Complex Instruction Set Computing (CISC), and surveys major RISC families such as ARM, MIPS, PowerPC, as well as Intel's low‑power Atom line and their roles in modern devices.
This article traces the origins of ARM from its 1978 founding as Cambridge Processor Unit, through Acorn’s early microcontroller projects, the development of the RISC architecture, the creation of the ARM licensing model, and its rise to dominate mobile and embedded computing worldwide.
The article traces the evolution of minicomputers from IBM's RISC‑based Power series and proprietary UNIX systems through a competitive era of closed architectures, to the modern shift toward open X86‑based platforms, highlighting how open standards, Linux and Intel’s strategies reshaped the market and reduced customer risk.
